Lines Matching refs:rd
83 .macro emc_device_mask, rd, base
84 ldr \rd, [\base, #EMC_ADR_CFG]
85 tst \rd, #0x1
86 moveq \rd, #(0x1 << 8) @ just 1 device
87 movne \rd, #(0x3 << 8) @ 2 devices
90 .macro emc_timing_update, rd, base
91 mov \rd, #1
92 str \rd, [\base, #EMC_TIMING_CONTROL]
94 ldr \rd, [\base, #EMC_EMC_STATUS]
95 tst \rd, #(0x1<<23) @ wait EMC_STATUS_TIMING_UPDATE_STALLED is clear
99 .macro pll_enable, rd, r_car_base, pll_base, pll_misc
100 ldr \rd, [\r_car_base, #\pll_base]
101 tst \rd, #(1 << 30)
102 orreq \rd, \rd, #(1 << 30)
103 streq \rd, [\r_car_base, #\pll_base]
106 ldr \rd, [\r_car_base, #\pll_misc]
107 bic \rd, \rd, #(1 << 18)
108 str \rd, [\r_car_base, #\pll_misc]
109 ldr \rd, [\r_car_base, #\pll_misc]
110 ldr \rd, [\r_car_base, #\pll_misc]
111 orr \rd, \rd, #(1 << 18)
112 str \rd, [\r_car_base, #\pll_misc]
116 .macro pll_locked, rd, r_car_base, pll_base
118 ldr \rd, [\r_car_base, #\pll_base]
119 tst \rd, #(1 << 27)
123 .macro pll_iddq_exit, rd, car, iddq, iddq_bit
124 ldr \rd, [\car, #\iddq]
125 bic \rd, \rd, #(1<<\iddq_bit)
126 str \rd, [\car, #\iddq]
129 .macro pll_iddq_entry, rd, car, iddq, iddq_bit
130 ldr \rd, [\car, #\iddq]
131 orr \rd, \rd, #(1<<\iddq_bit)
132 str \rd, [\car, #\iddq]