Lines Matching refs:r4
255 stmfd sp!, {r4-r11, lr}
264 ldr r4, =__tegra20_cpu1_resettable_status_offset
266 strb r3, [r0, r4]
283 ldr r4, =__tegra20_cpu1_resettable_status_offset
285 strb r3, [r0, r4]
308 ldmfd sp!, {r4 - r11, pc}
359 adr r4, tegra20_sdram_pad_save
366 ldr r1, [r4, r5]
380 adr r4, tegra20_sclk_save
381 ldr r4, [r4]
382 str r4, [r0, #CLK_RESET_SCLK_BURST]
383 mov32 r4, ((1 << 28) | (4)) @ burst policy is PLLP
384 str r4, [r0, #CLK_RESET_CCLK_BURST]
520 adr r4, tegra20_sdram_pad_save
528 str r1, [r4, r5] @ save the content of the addr