Lines Matching refs:r4
100 mov r4, #0x800 @ delay DLL relock, min 0x400 L3 clocks
102 subs r4, r4, #0x1
111 ldr r4, omap243x_sdi_prcm_voltctrl @ get addr of volt ctrl.
112 ldr r5, [r4] @ get value.
116 str r5, [r4] @ set up for change.
119 str r5, [r4] @ Force transition to L1
169 ldr r4, omap243x_srs_cm_clksel2_pll @ get address of out reg
170 ldr r3, [r4] @ get curr value
174 str r3, [r4] @ set new state (pll/x, x=1 or 2)
247 adr r4, pbegin @ addr of preload start
249 mcrr p15, 1, r8, r4, c12 @ preload into icache
258 ldr r4, omap243x_ssp_pll_stat @ addr of stat
261 ldr r8, [r4] @ stat value
267 ldr r4, omap243x_ssp_pll_div @ get addr
268 str r0, [r4] @ set dpll ctrl val
270 ldr r4, omap243x_ssp_set_config @ get addr
272 str r8, [r4] @ make dividers take
274 mov r4, #100 @ dead spin a bit
276 subs r4, r4, #1 @ dec loop
285 ldr r4, omap243x_ssp_pll_ctl @ get addr
287 str r8, [r4] @ set val
299 ldr r4, omap243x_ssp_sdrc_rfr @ get addr
300 str r1, [r4] @ update refresh timing
310 mov r4, #0x800 @ relock time (min 0x400 L3 clocks)
312 subs r4, r4, #0x1