Lines Matching refs:role
355 { .role = "32khz_clk", .clk = "dss_32khz_clk" },
356 { .role = "sys_clk", .clk = "dss_sys_clk" },
357 { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
402 { .role = "sys_clk", .clk = "dss_sys_clk" },
451 { .role = "sys_clk", .clk = "dss_sys_clk" },
472 { .role = "sys_clk", .clk = "dss_sys_clk" },
512 { .role = "sys_clk", .clk = "dss_sys_clk" },
553 { .role = "ick", .clk = "l3_iclk_div" },
648 { .role = "dbclk", .clk = "gpio1_dbclk" },
670 { .role = "dbclk", .clk = "gpio2_dbclk" },
693 { .role = "dbclk", .clk = "gpio3_dbclk" },
716 { .role = "dbclk", .clk = "gpio4_dbclk" },
739 { .role = "dbclk", .clk = "gpio5_dbclk" },
762 { .role = "dbclk", .clk = "gpio6_dbclk" },
785 { .role = "dbclk", .clk = "gpio7_dbclk" },
808 { .role = "dbclk", .clk = "gpio8_dbclk" },
1031 { .role = "pad_fck", .clk = "pad_clks_ck" },
1032 { .role = "prcm_fck", .clk = "mcbsp1_sync_mux_ck" },
1053 { .role = "pad_fck", .clk = "pad_clks_ck" },
1054 { .role = "prcm_fck", .clk = "mcbsp2_sync_mux_ck" },
1075 { .role = "pad_fck", .clk = "pad_clks_ck" },
1076 { .role = "prcm_fck", .clk = "mcbsp3_sync_mux_ck" },
1274 { .role = "32khz_clk", .clk = "mmc1_32khz_clk" },
1970 { .role = "refclk960m", .clk = "usb_otg_ss_refclk960m" },