Lines Matching refs:r12
100 ldr r12, omap_ih1_base @ set pointer to level1 handler
102 ldr r11, [r12, #IRQ_MIR_REG_OFFSET] @ fetch interrupts mask
104 ldr r13, [r12, #IRQ_ITR_REG_OFFSET] @ fetch interrupts status
108 ldr r10, [r12, #IRQ_SIR_FIQ_REG_OFFSET] @ get requested interrupt number
111 str r8, [r12, #IRQ_CONTROL_REG_OFFSET]
118 str r8, [r12, #IRQ_MIR_REG_OFFSET]
126 ldr r12, omap1510_gpio_base @ set base pointer to GPIO bank
128 ldr r11, [r12, #OMAP1510_GPIO_INT_MASK] @ fetch GPIO interrupts mask
130 ldr r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ fetch status bits
135 str r11, [r12, #OMAP1510_GPIO_INT_MASK]
144 str r10, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack the interrupt
146 str r11, [r12, #OMAP1510_GPIO_INT_MASK]
149 ldr r8, [r12, #OMAP1510_GPIO_DATA_INPUT] @ fetch GPIO input
168 str r11, [r12, #OMAP1510_GPIO_INT_MASK] @ store into the mask register
191 str r11, [r12, #OMAP1510_GPIO_INT_MASK] @ restore into the mask register
207 ldr r12, [r9, #BUF_BUFFER_START] @ get buffer start address
208 add r12, r12, r10, LSL #2 @ calculate buffer tail address
210 str r8, [r12] @ append it to the buffer tail