78 	u32 mask;  member
87 		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_08_BIT,
91 		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_09_BIT,
95 		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_19_BIT,
99 		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_07_BIT,
103 		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_00_BIT,
107 		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_01_BIT,
111 		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_02_BIT,
115 		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_03_BIT,
119 		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_04_BIT,
123 		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_05_BIT,
127 		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,
131 		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT,
135 		.mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,
139 		.mask = LPC32XX_CLKPWR_INTSRC_GPIO_01_BIT,
143 		.mask = LPC32XX_CLKPWR_INTSRC_GPIO_02_BIT,
147 		.mask = LPC32XX_CLKPWR_INTSRC_GPIO_03_BIT,
151 		.mask = LPC32XX_CLKPWR_INTSRC_GPIO_04_BIT,
155 		.mask = LPC32XX_CLKPWR_INTSRC_GPIO_05_BIT,
159 		.mask = LPC32XX_CLKPWR_INTSRC_KEY_BIT,
163 		.mask = LPC32XX_CLKPWR_INTSRC_MAC_BIT,
167 		.mask = LPC32XX_CLKPWR_INTSRC_USBATXINT_BIT,
171 		.mask = LPC32XX_CLKPWR_INTSRC_USB_BIT,
175 		.mask = LPC32XX_CLKPWR_INTSRC_RTC_BIT,
179 		.mask = LPC32XX_CLKPWR_INTSRC_MSTIMER_BIT,
183 		.mask = LPC32XX_CLKPWR_INTSRC_TS_AUX_BIT,
187 		.mask = LPC32XX_CLKPWR_INTSRC_TS_P_BIT,
191 		.mask = LPC32XX_CLKPWR_INTSRC_ADC_BIT,
212 	unsigned int reg, ctrl, mask;  in lpc32xx_mask_irq()  local
214 	get_controller(d->hwirq, &ctrl, &mask);  in lpc32xx_mask_irq()
216 	reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) & ~mask;  in lpc32xx_mask_irq()
222 	unsigned int reg, ctrl, mask;  in lpc32xx_unmask_irq()  local
224 	get_controller(d->hwirq, &ctrl, &mask);  in lpc32xx_unmask_irq()
226 	reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) | mask;  in lpc32xx_unmask_irq()
232 	unsigned int ctrl, mask;  in lpc32xx_ack_irq()  local
234 	get_controller(d->hwirq, &ctrl, &mask);  in lpc32xx_ack_irq()
236 	__raw_writel(mask, LPC32XX_INTC_RAW_STAT(ctrl));  in lpc32xx_ack_irq()
239 	if (lpc32xx_events[d->hwirq].mask != 0)  in lpc32xx_ack_irq()
240 		__raw_writel(lpc32xx_events[d->hwirq].mask,  in lpc32xx_ack_irq()
247 	unsigned int reg, ctrl, mask;  in __lpc32xx_set_irq_type()  local
249 	get_controller(irq, &ctrl, &mask);  in __lpc32xx_set_irq_type()
254 		reg |= mask;  in __lpc32xx_set_irq_type()
256 		reg &= ~mask;  in __lpc32xx_set_irq_type()
262 		reg |= mask;  in __lpc32xx_set_irq_type()
264 		reg &= ~mask;  in __lpc32xx_set_irq_type()
268 	if (lpc32xx_events[irq].mask != 0) {  in __lpc32xx_set_irq_type()
272 			reg |= lpc32xx_events[irq].mask;  in __lpc32xx_set_irq_type()
274 			reg &= ~lpc32xx_events[irq].mask;  in __lpc32xx_set_irq_type()
319 	if (lpc32xx_events[d->hwirq].mask != 0) {  in lpc32xx_irq_wake()
324 			eventreg |= lpc32xx_events[d->hwirq].mask;  in lpc32xx_irq_wake()
326 			eventreg &= ~lpc32xx_events[d->hwirq].mask;  in lpc32xx_irq_wake()
332 			__raw_writel(lpc32xx_events[d->hwirq].mask,  in lpc32xx_irq_wake()
344 	__raw_writel(lpc32xx_events[d->hwirq].mask,  in lpc32xx_irq_wake()