233 	u32 tv, tmp = 0;  in local_clk_pll_setup()  local
236 		tmp |= LPC32XX_CLKPWR_HCLKPLL_POWER_UP;  in local_clk_pll_setup()
238 		tmp |= LPC32XX_CLKPWR_HCLKPLL_CCO_BYPASS;  in local_clk_pll_setup()
240 		tmp |= LPC32XX_CLKPWR_HCLKPLL_POSTDIV_BYPASS;  in local_clk_pll_setup()
242 		tmp |= LPC32XX_CLKPWR_HCLKPLL_FDBK_SEL_FCLK;  in local_clk_pll_setup()
248 	tmp |= LPC32XX_CLKPWR_HCLKPLL_POSTDIV_2POW(tv);  in local_clk_pll_setup()
249 	tmp |= LPC32XX_CLKPWR_HCLKPLL_PREDIV_PLUS1(PllSetup->pll_n - 1);  in local_clk_pll_setup()
250 	tmp |= LPC32XX_CLKPWR_HCLKPLL_PLLM(PllSetup->pll_m - 1);  in local_clk_pll_setup()
252 	return tmp;  in local_clk_pll_setup()
377 	u32 reg, tmp = local_clk_pll_setup(pHCLKPllSetup);  in local_clk_usbpll_setup()  local
380 	reg |= tmp;  in local_clk_usbpll_setup()
545 	u32 tmp;  in local_onoff_enable()  local
547 	tmp = __raw_readl(clk->enable_reg);  in local_onoff_enable()
550 		tmp &= ~clk->enable_mask;  in local_onoff_enable()
552 		tmp |= clk->enable_mask;  in local_onoff_enable()
554 	__raw_writel(tmp, clk->enable_reg);  in local_onoff_enable()
764 	u32 tmp;  in local_usb_enable()  local
768 		tmp = __raw_readl(LPC32XX_CLKPWR_I2C_CLK_CTRL);  in local_usb_enable()
769 		tmp |= LPC32XX_CLKPWR_I2CCLK_USBI2CHI_DRIVE;  in local_usb_enable()
770 		__raw_writel(tmp, LPC32XX_CLKPWR_I2C_CLK_CTRL);  in local_usb_enable()
835 	u32 tmp;  in tsc_onoff_enable()  local
838 	tmp = __raw_readl(LPC32XX_CLKPWR_ADC_CLK_CTRL_1);  in tsc_onoff_enable()
839 	tmp &= ~LPC32XX_CLKPWR_ADCCTRL1_PCLK_SEL;  in tsc_onoff_enable()
840 	__raw_writel(tmp, LPC32XX_CLKPWR_ADC_CLK_CTRL_1);  in tsc_onoff_enable()
860 	u32 tmp;  in adc_onoff_enable()  local
864 	tmp = __raw_readl(LPC32XX_CLKPWR_ADC_CLK_CTRL_1);  in adc_onoff_enable()
865 	tmp |= LPC32XX_CLKPWR_ADCCTRL1_PCLK_SEL;  in adc_onoff_enable()
871 	tmp |= divider;  in adc_onoff_enable()
872 	__raw_writel(tmp, LPC32XX_CLKPWR_ADC_CLK_CTRL_1);  in adc_onoff_enable()
895 	u32 tmp;  in mmc_onoff_enable()  local
897 	tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL) &  in mmc_onoff_enable()
907 		tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_EN |  in mmc_onoff_enable()
910 	__raw_writel(tmp, LPC32XX_CLKPWR_MS_CTRL);  in mmc_onoff_enable()
957 	u32 tmp;  in mmc_set_rate()  local
965 	tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL) &  in mmc_set_rate()
967 	tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_DIV(div) |  in mmc_set_rate()
969 	__raw_writel(tmp, LPC32XX_CLKPWR_MS_CTRL);  in mmc_set_rate()
986 	u32 tmp, div, rate, oldclk;  in clcd_get_rate()  local
992 	tmp = __raw_readl(io_p2v(LPC32XX_LCD_BASE + CLCD_TIM2));  in clcd_get_rate()
998 	if (tmp & TIM2_BCD)  in clcd_get_rate()
1001 	div = (tmp & 0x1F) | ((tmp & 0xF8) >> 22);  in clcd_get_rate()
1002 	tmp = rate / (2 + div);  in clcd_get_rate()
1004 	return tmp;  in clcd_get_rate()
1009 	u32 tmp, prate, div, oldclk;  in clcd_set_rate()  local
1016 	tmp = __raw_readl(io_p2v(LPC32XX_LCD_BASE + CLCD_TIM2)) | TIM2_BCD;  in clcd_set_rate()
1024 			tmp &= ~TIM2_BCD;  in clcd_set_rate()
1027 		tmp &= ~(0xF800001F);  in clcd_set_rate()
1028 		tmp |= (div & 0x1F);  in clcd_set_rate()
1029 		tmp |= (((div >> 5) & 0x1F) << 27);  in clcd_set_rate()
1032 	__raw_writel(tmp, io_p2v(LPC32XX_LCD_BASE + CLCD_TIM2));  in clcd_set_rate()