Lines Matching refs:i
41 #define TZIC_INTSEC0(i) (0x0080 + ((i) << 2)) /* Interrupt Security Reg 0 */ argument
42 #define TZIC_ENSET0(i) (0x0100 + ((i) << 2)) /* Enable Set Reg 0 */ argument
43 #define TZIC_ENCLEAR0(i) (0x0180 + ((i) << 2)) /* Enable Clear Reg 0 */ argument
48 #define TZIC_HIPND(i) (0x0D80+ ((i) << 2)) /* High Priority Pending Register */ argument
49 #define TZIC_WAKEUP0(i) (0x0E00 + ((i) << 2)) /* Wakeup Config Register */ argument
132 int i, irqofs, handled; in tzic_handle_irq() local
137 for (i = 0; i < 4; i++) { in tzic_handle_irq()
138 stat = __raw_readl(tzic_base + TZIC_HIPND(i)) & in tzic_handle_irq()
139 __raw_readl(tzic_base + TZIC_INTSEC0(i)); in tzic_handle_irq()
144 handle_domain_irq(domain, irqofs + i * 32, regs); in tzic_handle_irq()
160 int i; in tzic_init_irq() local
169 i = __raw_readl(tzic_base + TZIC_INTCNTL); in tzic_init_irq()
175 for (i = 0; i < 4; i++) in tzic_init_irq()
176 __raw_writel(0xFFFFFFFF, tzic_base + TZIC_INTSEC0(i)); in tzic_init_irq()
179 for (i = 0; i < 4; i++) in tzic_init_irq()
180 __raw_writel(0xFFFFFFFF, tzic_base + TZIC_ENCLEAR0(i)); in tzic_init_irq()
191 for (i = 0; i < 4; i++, irq_base += 32) in tzic_init_irq()
192 tzic_init_gc(i, irq_base); in tzic_init_irq()
215 unsigned int i; in tzic_enable_wake() local
221 for (i = 0; i < 4; i++) in tzic_enable_wake()
222 __raw_writel(__raw_readl(tzic_base + TZIC_ENSET0(i)), in tzic_enable_wake()
223 tzic_base + TZIC_WAKEUP0(i)); in tzic_enable_wake()