222 	u32 val = readl_relaxed(ccm_base + CGPR);  in imx6q_set_int_mem_clk_lpm()  local
224 	val &= ~BM_CGPR_INT_MEM_CLK_LPM;  in imx6q_set_int_mem_clk_lpm()
226 		val |= BM_CGPR_INT_MEM_CLK_LPM;  in imx6q_set_int_mem_clk_lpm()
227 	writel_relaxed(val, ccm_base + CGPR);  in imx6q_set_int_mem_clk_lpm()
232 	u32 val;  in imx6_enable_rbc()  local
241 	val = readl_relaxed(ccm_base + CCR);  in imx6_enable_rbc()
242 	val &= ~BM_CCR_RBC_EN;  in imx6_enable_rbc()
243 	val |= enable ? BM_CCR_RBC_EN : 0;  in imx6_enable_rbc()
244 	writel_relaxed(val, ccm_base + CCR);  in imx6_enable_rbc()
247 	val = readl_relaxed(ccm_base + CCR);  in imx6_enable_rbc()
248 	val &= ~BM_CCR_RBC_BYPASS_COUNT;  in imx6_enable_rbc()
249 	val |= enable ? BM_CCR_RBC_BYPASS_COUNT : 0;  in imx6_enable_rbc()
250 	writel(val, ccm_base + CCR);  in imx6_enable_rbc()
265 	u32 val;  in imx6q_enable_wb()  local
268 	val = readl_relaxed(ccm_base + CLPCR);  in imx6q_enable_wb()
269 	val &= ~BM_CLPCR_WB_PER_AT_LPM;  in imx6q_enable_wb()
270 	val |= enable ? BM_CLPCR_WB_PER_AT_LPM : 0;  in imx6q_enable_wb()
271 	writel_relaxed(val, ccm_base + CLPCR);  in imx6q_enable_wb()
274 	val = readl_relaxed(ccm_base + CCR);  in imx6q_enable_wb()
275 	val &= ~BM_CCR_WB_COUNT;  in imx6q_enable_wb()
276 	val |= enable ? BM_CCR_WB_COUNT : 0;  in imx6q_enable_wb()
277 	writel_relaxed(val, ccm_base + CCR);  in imx6q_enable_wb()
282 	u32 val = readl_relaxed(ccm_base + CLPCR);  in imx6_set_lpm()  local
284 	val &= ~BM_CLPCR_LPM;  in imx6_set_lpm()
289 		val |= 0x1 << BP_CLPCR_LPM;  in imx6_set_lpm()
290 		val |= BM_CLPCR_ARM_CLK_DIS_ON_LPM;  in imx6_set_lpm()
293 		val |= 0x2 << BP_CLPCR_LPM;  in imx6_set_lpm()
294 		val &= ~BM_CLPCR_VSTBY;  in imx6_set_lpm()
295 		val &= ~BM_CLPCR_SBYOS;  in imx6_set_lpm()
297 			val |= BM_CLPCR_BYPASS_PMIC_READY;  in imx6_set_lpm()
299 			val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;  in imx6_set_lpm()
301 			val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;  in imx6_set_lpm()
304 		val |= 0x1 << BP_CLPCR_LPM;  in imx6_set_lpm()
305 		val &= ~BM_CLPCR_VSTBY;  in imx6_set_lpm()
306 		val &= ~BM_CLPCR_SBYOS;  in imx6_set_lpm()
309 		val |= 0x2 << BP_CLPCR_LPM;  in imx6_set_lpm()
310 		val |= 0x3 << BP_CLPCR_STBY_COUNT;  in imx6_set_lpm()
311 		val |= BM_CLPCR_VSTBY;  in imx6_set_lpm()
312 		val |= BM_CLPCR_SBYOS;  in imx6_set_lpm()
314 			val |= BM_CLPCR_BYPASS_PMIC_READY;  in imx6_set_lpm()
316 			val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;  in imx6_set_lpm()
318 			val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;  in imx6_set_lpm()
339 	writel_relaxed(val, ccm_base + CLPCR);  in imx6_set_lpm()
345 static int imx6q_suspend_finish(unsigned long val)  in imx6q_suspend_finish()  argument
608 	u32 val;  in imx6_pm_ccm_init()  local
618 	val = readl_relaxed(ccm_base + CLPCR);  in imx6_pm_ccm_init()
619 	val &= ~BM_CLPCR_LPM;  in imx6_pm_ccm_init()
620 	writel_relaxed(val, ccm_base + CLPCR);  in imx6_pm_ccm_init()