Lines Matching refs:parent
31 struct clk *parent; member
54 .parent = &clk_xtali,
61 .parent = &clk_xtali,
68 .parent = &clk_xtali,
75 .parent = &clk_xtali,
78 .parent = &clk_pll1,
81 .parent = &clk_pll1,
84 .parent = &clk_pll1,
87 .parent = &clk_xtali,
90 .parent = &clk_pll2,
95 .parent = &clk_xtali,
102 .parent = &clk_xtali,
106 .parent = &clk_xtali,
126 .parent = &clk_i2s_mclk,
134 .parent = &clk_i2s_sclk,
142 .parent = &clk_h,
147 .parent = &clk_h,
152 .parent = &clk_h,
157 .parent = &clk_h,
162 .parent = &clk_h,
167 .parent = &clk_h,
172 .parent = &clk_h,
177 .parent = &clk_h,
182 .parent = &clk_h,
187 .parent = &clk_h,
192 .parent = &clk_h,
197 .parent = &clk_h,
242 if (clk->parent) in __clk_enable()
243 __clk_enable(clk->parent); in __clk_enable()
287 if (clk->parent) in __clk_disable()
288 __clk_disable(clk->parent); in __clk_disable()
307 unsigned long rate = clk_get_rate(clk->parent); in get_uart_rate()
396 clk->parent = mclk; in calc_clk_div()