Lines Matching refs:clk_h
80 static struct clk clk_h = { variable
142 .parent = &clk_h,
147 .parent = &clk_h,
152 .parent = &clk_h,
157 .parent = &clk_h,
162 .parent = &clk_h,
167 .parent = &clk_h,
172 .parent = &clk_h,
177 .parent = &clk_h,
182 .parent = &clk_h,
187 .parent = &clk_h,
192 .parent = &clk_h,
197 .parent = &clk_h,
212 INIT_CK(NULL, "hclk", &clk_h),
503 clk_m2p0.rate = clk_h.rate; in ep93xx_dma_clock_init()
504 clk_m2p1.rate = clk_h.rate; in ep93xx_dma_clock_init()
505 clk_m2p2.rate = clk_h.rate; in ep93xx_dma_clock_init()
506 clk_m2p3.rate = clk_h.rate; in ep93xx_dma_clock_init()
507 clk_m2p4.rate = clk_h.rate; in ep93xx_dma_clock_init()
508 clk_m2p5.rate = clk_h.rate; in ep93xx_dma_clock_init()
509 clk_m2p6.rate = clk_h.rate; in ep93xx_dma_clock_init()
510 clk_m2p7.rate = clk_h.rate; in ep93xx_dma_clock_init()
511 clk_m2p8.rate = clk_h.rate; in ep93xx_dma_clock_init()
512 clk_m2p9.rate = clk_h.rate; in ep93xx_dma_clock_init()
513 clk_m2m0.rate = clk_h.rate; in ep93xx_dma_clock_init()
514 clk_m2m1.rate = clk_h.rate; in ep93xx_dma_clock_init()
530 clk_h.rate = clk_pll1.rate / hclk_divisors[(value >> 20) & 0x7]; in ep93xx_clock_init()
531 clk_p.rate = clk_h.rate / pclk_divisors[(value >> 18) & 0x3]; in ep93xx_clock_init()
557 clk_f.rate / 1000000, clk_h.rate / 1000000, in ep93xx_clock_init()