Lines Matching refs:MUX_CFG
383 MUX_CFG(DM644X, HDIREN, 0, 16, 1, 1, true)
384 MUX_CFG(DM644X, ATAEN, 0, 17, 1, 1, true)
385 MUX_CFG(DM644X, ATAEN_DISABLE, 0, 17, 1, 0, true)
387 MUX_CFG(DM644X, HPIEN_DISABLE, 0, 29, 1, 0, true)
389 MUX_CFG(DM644X, AEAW, 0, 0, 31, 31, true)
390 MUX_CFG(DM644X, AEAW0, 0, 0, 1, 0, true)
391 MUX_CFG(DM644X, AEAW1, 0, 1, 1, 0, true)
392 MUX_CFG(DM644X, AEAW2, 0, 2, 1, 0, true)
393 MUX_CFG(DM644X, AEAW3, 0, 3, 1, 0, true)
394 MUX_CFG(DM644X, AEAW4, 0, 4, 1, 0, true)
396 MUX_CFG(DM644X, MSTK, 1, 9, 1, 0, false)
398 MUX_CFG(DM644X, I2C, 1, 7, 1, 1, false)
400 MUX_CFG(DM644X, MCBSP, 1, 10, 1, 1, false)
402 MUX_CFG(DM644X, UART1, 1, 1, 1, 1, true)
403 MUX_CFG(DM644X, UART2, 1, 2, 1, 1, true)
405 MUX_CFG(DM644X, PWM0, 1, 4, 1, 1, false)
407 MUX_CFG(DM644X, PWM1, 1, 5, 1, 1, false)
409 MUX_CFG(DM644X, PWM2, 1, 6, 1, 1, false)
411 MUX_CFG(DM644X, VLYNQEN, 0, 15, 1, 1, false)
412 MUX_CFG(DM644X, VLSCREN, 0, 14, 1, 1, false)
413 MUX_CFG(DM644X, VLYNQWD, 0, 12, 3, 3, false)
415 MUX_CFG(DM644X, EMACEN, 0, 31, 1, 1, true)
417 MUX_CFG(DM644X, GPIO3V, 0, 31, 1, 0, true)
419 MUX_CFG(DM644X, GPIO0, 0, 24, 1, 0, true)
420 MUX_CFG(DM644X, GPIO3, 0, 25, 1, 0, false)
421 MUX_CFG(DM644X, GPIO43_44, 1, 7, 1, 0, false)
422 MUX_CFG(DM644X, GPIO46_47, 0, 22, 1, 0, true)
424 MUX_CFG(DM644X, RGB666, 0, 22, 1, 1, true)
426 MUX_CFG(DM644X, LOEEN, 0, 24, 1, 1, true)
427 MUX_CFG(DM644X, LFLDEN, 0, 25, 1, 1, false)