Lines Matching refs:start
163 .start = DA8XX_TPCC_BASE,
169 .start = DA8XX_TPTC0_BASE,
175 .start = DA8XX_TPTC1_BASE,
181 .start = IRQ_DA8XX_CCINT0,
186 .start = IRQ_DA8XX_CCERRINT,
194 .start = DA850_TPCC1_BASE,
200 .start = DA850_TPTC2_BASE,
206 .start = IRQ_DA850_CCINT1,
211 .start = IRQ_DA850_CCERRINT1,
266 .start = DA8XX_I2C0_BASE,
271 .start = IRQ_DA8XX_I2CINT0,
286 .start = DA8XX_I2C1_BASE,
291 .start = IRQ_DA8XX_I2CINT1,
322 .start = DA8XX_WDOG_BASE,
355 .start = DA8XX_EMAC_CPPI_PORT_BASE,
360 .start = IRQ_DA8XX_C0_RX_THRESH_PULSE,
365 .start = IRQ_DA8XX_C0_RX_PULSE,
370 .start = IRQ_DA8XX_C0_TX_PULSE,
375 .start = IRQ_DA8XX_C0_MISC_PULSE,
401 .start = DA8XX_EMAC_MDIO_BASE,
428 .start = DAVINCI_DA830_MCASP1_REG_BASE,
435 .start = DAVINCI_DA830_DMA_MCASP1_AXEVT,
442 .start = DAVINCI_DA830_DMA_MCASP1_AREVT,
448 .start = IRQ_DA8XX_MCASPINT,
463 .start = DAVINCI_DA830_MCASP2_REG_BASE,
470 .start = DAVINCI_DA830_DMA_MCASP2_AXEVT,
477 .start = DAVINCI_DA830_DMA_MCASP2_AREVT,
483 .start = IRQ_DA8XX_MCASPINT,
498 .start = DAVINCI_DA8XX_MCASP0_REG_BASE,
505 .start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
512 .start = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
518 .start = IRQ_DA8XX_MCASPINT,
561 .start = DA8XX_PRUSS_MEM_BASE,
566 .start = IRQ_DA8XX_EVTOUT0,
571 .start = IRQ_DA8XX_EVTOUT1,
576 .start = IRQ_DA8XX_EVTOUT2,
581 .start = IRQ_DA8XX_EVTOUT3,
586 .start = IRQ_DA8XX_EVTOUT4,
591 .start = IRQ_DA8XX_EVTOUT5,
596 .start = IRQ_DA8XX_EVTOUT6,
601 .start = IRQ_DA8XX_EVTOUT7,
647 .start = DA8XX_LCD_CNTRL_BASE,
652 .start = IRQ_DA8XX_LCDINT,
673 .start = DA8XX_GPIO_BASE,
678 .start = IRQ_DA8XX_GPIO0,
699 .start = DA8XX_MMCSD0_BASE,
704 .start = IRQ_DA8XX_MMCSDINT0,
709 .start = DA8XX_DMA_MMCSD0_RX,
714 .start = DA8XX_DMA_MMCSD0_TX,
736 .start = DA850_MMCSD1_BASE,
741 .start = IRQ_DA850_MMCSDINT0_1,
746 .start = DA850_DMA_MMCSD1_RX,
751 .start = DA850_DMA_MMCSD1_TX,
773 .start = DA8XX_SYSCFG0_BASE + DA8XX_HOST1CFG_REG,
778 .start = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG,
783 .start = IRQ_DA8XX_CHIPINT0,
859 .start = DA8XX_RTC_BASE,
864 .start = IRQ_DA8XX_RTC,
869 .start = IRQ_DA8XX_RTC,
902 .start = DA8XX_DDR2_CTL_BASE,
932 .start = DA8XX_SPI0_BASE,
937 .start = IRQ_DA8XX_SPINT0,
942 .start = DA8XX_DMA_SPI0_RX,
947 .start = DA8XX_DMA_SPI0_TX,
955 .start = DA830_SPI1_BASE,
960 .start = IRQ_DA8XX_SPINT1,
965 .start = DA8XX_DMA_SPI1_RX,
970 .start = DA8XX_DMA_SPI1_TX,
1020 da8xx_spi1_resources[0].start = DA850_SPI1_BASE; in da8xx_register_spi_bus()
1030 .start = DA850_SATA_BASE,
1035 .start = DA8XX_SYSCFG1_BASE + DA8XX_PWRDN_REG,
1040 .start = IRQ_DA850_SATAINT,