Lines Matching refs:r3

97 	and	r0, r3, #AT91_PM_MEMTYPE_MASK
100 	lsr	r0, r3, #AT91_PM_MODE_OFFSET
219 	mov	r3, #1
220 	str	r3, [r2, #AT91_MC_SDRAMC_SRR]
234 	ldr	r3, [r2, #AT91_DDRSDRC_MDR]
235 	str	r3, .saved_sam9_mdr
236 	bic	r3, r3, #~AT91_DDRSDRC_MD
237 	cmp	r3, #AT91_DDRSDRC_MD_LOW_POWER_DDR
238 	ldreq	r3, [r2, #AT91_DDRSDRC_MDR]
239 	biceq	r3, r3, #AT91_DDRSDRC_MD
240 	orreq	r3, r3, #AT91_DDRSDRC_MD_DDR2
241 	streq	r3, [r2, #AT91_DDRSDRC_MDR]
244 	ldr	r3, [r2, #AT91_DDRSDRC_LPR]
245 	str	r3, .saved_sam9_lpr
246 	bic	r3, r3, #AT91_DDRSDRC_LPCB
247 	orr	r3, r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH
248 	str	r3, [r2, #AT91_DDRSDRC_LPR]
255 	ldr	r3, [r2, #AT91_DDRSDRC_MDR]
256 	str	r3, .saved_sam9_mdr1
257 	bic	r3, r3, #~AT91_DDRSDRC_MD
258 	cmp	r3, #AT91_DDRSDRC_MD_LOW_POWER_DDR
259 	ldreq	r3, [r2, #AT91_DDRSDRC_MDR]
260 	biceq	r3, r3, #AT91_DDRSDRC_MD
261 	orreq	r3, r3, #AT91_DDRSDRC_MD_DDR2
262 	streq	r3, [r2, #AT91_DDRSDRC_MDR]
265 	ldr	r3, [r2, #AT91_DDRSDRC_LPR]
266 	str	r3, .saved_sam9_lpr1
267 	bic	r3, r3, #AT91_DDRSDRC_LPCB
268 	orr	r3, r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH
269 	str	r3, [r2, #AT91_DDRSDRC_LPR]
276 	ldr	r3, .saved_sam9_mdr
277 	str	r3, [r2, #AT91_DDRSDRC_MDR]
279 	ldr	r3, .saved_sam9_lpr
280 	str	r3, [r2, #AT91_DDRSDRC_LPR]
285 	ldrne	r3, .saved_sam9_mdr1
286 	strne	r3, [r2, #AT91_DDRSDRC_MDR]
287 	ldrne	r3, .saved_sam9_lpr1
288 	strne	r3, [r2, #AT91_DDRSDRC_LPR]
300 	ldr	r3, [r2, #AT91_SDRAMC_LPR]
301 	str	r3, .saved_sam9_lpr
302 	bic	r3, r3, #AT91_SDRAMC_LPCB
303 	orr	r3, r3, #AT91_SDRAMC_LPCB_SELF_REFRESH
304 	str	r3, [r2, #AT91_SDRAMC_LPR]
307 	ldr	r3, .saved_sam9_lpr
308 	str	r3, [r2, #AT91_SDRAMC_LPR]