Lines Matching refs:r7
96 mrs r7, SP_fiq
120 msr SP_fiq, r7
174 msr SP_fiq, r7
255 mrrc p15, 0, r6, r7, c2 @ TTBR 0
269 strd r6, r7, [r2]
282 mrc p15, 0, r7, c5, c0, 1 @ IFSR
297 str r7, [vcpu, #CP15_OFFSET(c5_IFSR)]
308 mrc p15, 0, r7, c10, c3, 1 @ AMAIR1
311 push {r2,r4-r7}
317 str r7, [vcpu, #CP15_OFFSET(c10_AMAIR1)]
330 pop {r2,r4-r7}
336 ldr r7, [vcpu, #CP15_OFFSET(c10_AMAIR1)]
342 mcr p15, 0, r7, c10, c3, 1 @ AMAIR1
352 ldr r7, [vcpu, #CP15_OFFSET(c5_IFSR)]
365 mcr p15, 0, r7, c5, c0, 1 @ IFSR
380 ldrd r6, r7, [r12]
392 mcrr p15, 0, r6, r7, c2 @ TTBR 0
418 ldr r7, [r2, #GICH_EISR1]
425 ARM_BE8(rev r7, r7 )
434 str r7, [r11, #VGIC_V2_CPU_EISR]
439 str r7, [r11, #(VGIC_V2_CPU_EISR + 4)]