Lines Matching refs:val

107 	u32 val;  in xscale1pmu_read_pmnc()  local
108 asm volatile("mrc p14, 0, %0, c0, c0, 0" : "=r" (val)); in xscale1pmu_read_pmnc()
109 return val; in xscale1pmu_read_pmnc()
113 xscale1pmu_write_pmnc(u32 val) in xscale1pmu_write_pmnc() argument
116 val &= 0xffff77f; in xscale1pmu_write_pmnc()
117 asm volatile("mcr p14, 0, %0, c0, c0, 0" : : "r" (val)); in xscale1pmu_write_pmnc()
206 unsigned long val, mask, evt, flags; in xscale1pmu_enable_event() local
233 val = xscale1pmu_read_pmnc(); in xscale1pmu_enable_event()
234 val &= ~mask; in xscale1pmu_enable_event()
235 val |= evt; in xscale1pmu_enable_event()
236 xscale1pmu_write_pmnc(val); in xscale1pmu_enable_event()
242 unsigned long val, mask, evt, flags; in xscale1pmu_disable_event() local
267 val = xscale1pmu_read_pmnc(); in xscale1pmu_disable_event()
268 val &= ~mask; in xscale1pmu_disable_event()
269 val |= evt; in xscale1pmu_disable_event()
270 xscale1pmu_write_pmnc(val); in xscale1pmu_disable_event()
297 unsigned long flags, val; in xscale1pmu_start() local
301 val = xscale1pmu_read_pmnc(); in xscale1pmu_start()
302 val |= XSCALE_PMU_ENABLE; in xscale1pmu_start()
303 xscale1pmu_write_pmnc(val); in xscale1pmu_start()
309 unsigned long flags, val; in xscale1pmu_stop() local
313 val = xscale1pmu_read_pmnc(); in xscale1pmu_stop()
314 val &= ~XSCALE_PMU_ENABLE; in xscale1pmu_stop()
315 xscale1pmu_write_pmnc(val); in xscale1pmu_stop()
323 u32 val = 0; in xscale1pmu_read_counter() local
327 asm volatile("mrc p14, 0, %0, c1, c0, 0" : "=r" (val)); in xscale1pmu_read_counter()
330 asm volatile("mrc p14, 0, %0, c2, c0, 0" : "=r" (val)); in xscale1pmu_read_counter()
333 asm volatile("mrc p14, 0, %0, c3, c0, 0" : "=r" (val)); in xscale1pmu_read_counter()
337 return val; in xscale1pmu_read_counter()
340 static inline void xscale1pmu_write_counter(struct perf_event *event, u32 val) in xscale1pmu_write_counter() argument
347 asm volatile("mcr p14, 0, %0, c1, c0, 0" : : "r" (val)); in xscale1pmu_write_counter()
350 asm volatile("mcr p14, 0, %0, c2, c0, 0" : : "r" (val)); in xscale1pmu_write_counter()
353 asm volatile("mcr p14, 0, %0, c3, c0, 0" : : "r" (val)); in xscale1pmu_write_counter()
405 u32 val; in xscale2pmu_read_pmnc() local
406 asm volatile("mrc p14, 0, %0, c0, c1, 0" : "=r" (val)); in xscale2pmu_read_pmnc()
408 return val & 0xff000009; in xscale2pmu_read_pmnc()
412 xscale2pmu_write_pmnc(u32 val) in xscale2pmu_write_pmnc() argument
415 val &= 0xf; in xscale2pmu_write_pmnc()
416 asm volatile("mcr p14, 0, %0, c0, c1, 0" : : "r" (val)); in xscale2pmu_write_pmnc()
422 u32 val; in xscale2pmu_read_overflow_flags() local
423 asm volatile("mrc p14, 0, %0, c5, c1, 0" : "=r" (val)); in xscale2pmu_read_overflow_flags()
424 return val; in xscale2pmu_read_overflow_flags()
428 xscale2pmu_write_overflow_flags(u32 val) in xscale2pmu_write_overflow_flags() argument
430 asm volatile("mcr p14, 0, %0, c5, c1, 0" : : "r" (val)); in xscale2pmu_write_overflow_flags()
436 u32 val; in xscale2pmu_read_event_select() local
437 asm volatile("mrc p14, 0, %0, c8, c1, 0" : "=r" (val)); in xscale2pmu_read_event_select()
438 return val; in xscale2pmu_read_event_select()
442 xscale2pmu_write_event_select(u32 val) in xscale2pmu_write_event_select() argument
444 asm volatile("mcr p14, 0, %0, c8, c1, 0" : : "r"(val)); in xscale2pmu_write_event_select()
450 u32 val; in xscale2pmu_read_int_enable() local
451 asm volatile("mrc p14, 0, %0, c4, c1, 0" : "=r" (val)); in xscale2pmu_read_int_enable()
452 return val; in xscale2pmu_read_int_enable()
456 xscale2pmu_write_int_enable(u32 val) in xscale2pmu_write_int_enable() argument
458 asm volatile("mcr p14, 0, %0, c4, c1, 0" : : "r" (val)); in xscale2pmu_write_int_enable()
661 unsigned long flags, val; in xscale2pmu_start() local
665 val = xscale2pmu_read_pmnc() & ~XSCALE_PMU_CNT64; in xscale2pmu_start()
666 val |= XSCALE_PMU_ENABLE; in xscale2pmu_start()
667 xscale2pmu_write_pmnc(val); in xscale2pmu_start()
673 unsigned long flags, val; in xscale2pmu_stop() local
677 val = xscale2pmu_read_pmnc(); in xscale2pmu_stop()
678 val &= ~XSCALE_PMU_ENABLE; in xscale2pmu_stop()
679 xscale2pmu_write_pmnc(val); in xscale2pmu_stop()
687 u32 val = 0; in xscale2pmu_read_counter() local
691 asm volatile("mrc p14, 0, %0, c1, c1, 0" : "=r" (val)); in xscale2pmu_read_counter()
694 asm volatile("mrc p14, 0, %0, c0, c2, 0" : "=r" (val)); in xscale2pmu_read_counter()
697 asm volatile("mrc p14, 0, %0, c1, c2, 0" : "=r" (val)); in xscale2pmu_read_counter()
700 asm volatile("mrc p14, 0, %0, c2, c2, 0" : "=r" (val)); in xscale2pmu_read_counter()
703 asm volatile("mrc p14, 0, %0, c3, c2, 0" : "=r" (val)); in xscale2pmu_read_counter()
707 return val; in xscale2pmu_read_counter()
710 static inline void xscale2pmu_write_counter(struct perf_event *event, u32 val) in xscale2pmu_write_counter() argument
717 asm volatile("mcr p14, 0, %0, c1, c1, 0" : : "r" (val)); in xscale2pmu_write_counter()
720 asm volatile("mcr p14, 0, %0, c0, c2, 0" : : "r" (val)); in xscale2pmu_write_counter()
723 asm volatile("mcr p14, 0, %0, c1, c2, 0" : : "r" (val)); in xscale2pmu_write_counter()
726 asm volatile("mcr p14, 0, %0, c2, c2, 0" : : "r" (val)); in xscale2pmu_write_counter()
729 asm volatile("mcr p14, 0, %0, c3, c2, 0" : : "r" (val)); in xscale2pmu_write_counter()