Lines Matching refs:rv
54 #define checkuart(rp, rv, lhu, bit, uart) \ argument
76 .macro addruart, rp, rv, tmp
78 ldr \rv, [\rp] @ linked addr is stored there
79 sub \rv, \rv, \rp @ offset between the two
81 sub \tmp, \rp, \rv @ actual tegra_uart_config
85 mov \rv, #0 @ yes; record init is done
86 str \rv, [\tmp]
92 lsr \rv, \rp, #18 @ 19:18 are console type
93 and \rv, \rv, #3
94 cmp \rv, #2 @ 2 and 3 mean DCC, UART
96 cmp \rv, #3 @ so accept either
98 11: lsr \rv, \rp, #15 @ 17:15 are UART ID
99 and \rv, #7
100 cmp \rv, #0 @ UART 0?
102 cmp \rv, #1 @ UART 1?
104 cmp \rv, #2 @ UART 2?
106 cmp \rv, #3 @ UART 3?
108 cmp \rv, #4 @ UART 4?
116 20: checkuart(\rp, \rv, L, 6, A)
122 21: checkuart(\rp, \rv, L, 7, B)
128 22: checkuart(\rp, \rv, H, 23, C)
134 23: checkuart(\rp, \rv, U, 1, D)
141 checkuart(\rp, \rv, U, 2, E)
154 92: and \rv, \rp, #0xffffff @ offset within 1MB section
155 add \rv, \rv, #UART_VIRTUAL_BASE
156 str \rv, [\tmp, #8] @ Store in tegra_uart_virt
166 ldr \rv, [\tmp, #8] @ Load tegra_uart_virt