Lines Matching refs:clock
100 clock-names = "refclk", "timclk", "apb_pclk";
101 #clock-cells = <1>;
102 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
104 …assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz…
126 clock-names = "apb_pclk";
138 clock-names = "mclk", "apb_pclk";
146 clock-names = "KMIREFCLK", "apb_pclk";
154 clock-names = "KMIREFCLK", "apb_pclk";
162 clock-names = "uartclk", "apb_pclk";
170 clock-names = "uartclk", "apb_pclk";
178 clock-names = "uartclk", "apb_pclk";
186 clock-names = "uartclk", "apb_pclk";
194 clock-names = "wdogclk", "apb_pclk";
202 clock-names = "timclken1", "timclken2", "apb_pclk";
210 clock-names = "timclken1", "timclken2", "apb_pclk";
237 clock-names = "apb_pclk";
253 clock-names = "clcdclk", "apb_pclk";
274 clock-frequency = <25175000>;
297 compatible = "fixed-clock";
298 #clock-cells = <0>;
299 clock-frequency = <24000000>;
300 clock-output-names = "v2m:clk24mhz";
304 compatible = "fixed-clock";
305 #clock-cells = <0>;
306 clock-frequency = <1000000>;
307 clock-output-names = "v2m:refclk1mhz";
311 compatible = "fixed-clock";
312 #clock-cells = <0>;
313 clock-frequency = <32768>;
314 clock-output-names = "v2m:refclk32khz";
374 /* MCC static memory clock */
378 #clock-cells = <0>;
379 clock-output-names = "v2m:oscclk0";
383 /* CLCD clock */
387 #clock-cells = <0>;
388 clock-output-names = "v2m:oscclk1";
392 /* IO FPGA peripheral clock */
396 #clock-cells = <0>;
397 clock-output-names = "v2m:oscclk2";