Lines Matching refs:SE_NICLK_IO
171 txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
172 txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
173 txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
174 txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
175 txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
176 txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
184 rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
185 rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
186 rxd2 = <&pio1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
187 rxd3 = <&pio1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;
189 rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
190 rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
468 txen = <&pio13 7 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
469 txd0 = <&pio14 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
470 txd1 = <&pio14 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
471 txd2 = <&pio14 2 ALT2 OUT SE_NICLK_IO 0 CLK_B>;
472 txd3 = <&pio14 3 ALT2 OUT SE_NICLK_IO 0 CLK_B>;
475 txer = <&pio15 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>;
481 rxd0 = <&pio16 0 ALT2 IN SE_NICLK_IO 0 CLK_A>;
482 rxd1 = <&pio16 1 ALT2 IN SE_NICLK_IO 0 CLK_A>;
483 rxd2 = <&pio16 2 ALT2 IN SE_NICLK_IO 0 CLK_A>;
484 rxd3 = <&pio16 3 ALT2 IN SE_NICLK_IO 0 CLK_A>;
485 rxdv = <&pio15 6 ALT2 IN SE_NICLK_IO 0 CLK_A>;
486 rx_er = <&pio15 7 ALT2 IN SE_NICLK_IO 0 CLK_A>;