Lines Matching refs:dma

437 			dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */
438 <&dma 38 0 0x0>, /* Logical - MemToDev */
439 <&dma 37 0 0x2>, /* Logical - DevToMem */
440 <&dma 37 0 0x0>, /* Logical - MemToDev */
441 <&dma 36 0 0x2>, /* Logical - DevToMem */
442 <&dma 36 0 0x0>, /* Logical - MemToDev */
443 <&dma 19 0 0x2>, /* Logical - DevToMem */
444 <&dma 19 0 0x0>, /* Logical - MemToDev */
445 <&dma 18 0 0x2>, /* Logical - DevToMem */
446 <&dma 18 0 0x0>, /* Logical - MemToDev */
447 <&dma 17 0 0x2>, /* Logical - DevToMem */
448 <&dma 17 0 0x0>, /* Logical - MemToDev */
449 <&dma 16 0 0x2>, /* Logical - DevToMem */
450 <&dma 16 0 0x0>, /* Logical - MemToDev */
451 <&dma 39 0 0x2>, /* Logical - DevToMem */
452 <&dma 39 0 0x0>; /* Logical - MemToDev */
454 dma-names = "iep_1_9", "oep_1_9",
466 dma: dma-controller@801C0000 { label
472 #dma-cells = <3>;
905 dmas = <&dma 8 0 0x2>, /* Logical - DevToMem */
906 <&dma 8 0 0x0>; /* Logical - MemToDev */
907 dma-names = "rx", "tx";
919 dmas = <&dma 9 0 0x2>, /* Logical - DevToMem */
920 <&dma 9 0 0x0>; /* Logical - MemToDev */
921 dma-names = "rx", "tx";
934 dmas = <&dma 0 0 0x2>, /* Logical - DevToMem */
935 <&dma 0 0 0x0>; /* Logical - MemToDev */
936 dma-names = "rx", "tx";
949 dmas = <&dma 35 0 0x2>, /* Logical - DevToMem */
950 <&dma 35 0 0x0>; /* Logical - MemToDev */
951 dma-names = "rx", "tx";
964 dmas = <&dma 33 0 0x2>, /* Logical - DevToMem */
965 <&dma 33 0 0x0>; /* Logical - MemToDev */
966 dma-names = "rx", "tx";
979 dmas = <&dma 40 0 0x2>, /* Logical - DevToMem */
980 <&dma 40 0 0x0>; /* Logical - MemToDev */
981 dma-names = "rx", "tx";
990 dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
991 <&dma 13 0 0x0>; /* Logical - MemToDev */
992 dma-names = "rx", "tx";
1005 dmas = <&dma 12 0 0x2>, /* Logical - DevToMem */
1006 <&dma 12 0 0x0>; /* Logical - MemToDev */
1007 dma-names = "rx", "tx";
1020 dmas = <&dma 11 0 0x2>, /* Logical - DevToMem */
1021 <&dma 11 0 0x0>; /* Logical - MemToDev */
1022 dma-names = "rx", "tx";
1035 dmas = <&dma 29 0 0x2>, /* Logical - DevToMem */
1036 <&dma 29 0 0x0>; /* Logical - MemToDev */
1037 dma-names = "rx", "tx";
1051 dmas = <&dma 32 0 0x2>, /* Logical - DevToMem */
1052 <&dma 32 0 0x0>; /* Logical - MemToDev */
1053 dma-names = "rx", "tx";
1067 dmas = <&dma 28 0 0x2>, /* Logical - DevToMem */
1068 <&dma 28 0 0x0>; /* Logical - MemToDev */
1069 dma-names = "rx", "tx";
1083 dmas = <&dma 41 0 0x2>, /* Logical - DevToMem */
1084 <&dma 41 0 0x0>; /* Logical - MemToDev */
1085 dma-names = "rx", "tx";
1099 dmas = <&dma 42 0 0x2>, /* Logical - DevToMem */
1100 <&dma 42 0 0x0>; /* Logical - MemToDev */
1101 dma-names = "rx", "tx";
1115 dmas = <&dma 43 0 0x2>, /* Logical - DevToMem */
1116 <&dma 43 0 0x0>; /* Logical - MemToDev */
1117 dma-names = "rx", "tx";
1132 dmas = <&dma 31 0 0x12>, /* Logical - DevToMem - HighPrio */
1133 <&dma 31 0 0x10>; /* Logical - MemToDev - HighPrio */
1134 dma-names = "rx", "tx";
1149 dmas = <&dma 30 0 0x10>; /* Logical - MemToDev - HighPrio */
1150 dma-names = "tx";
1165 dmas = <&dma 14 0 0x12>, /* Logical - DevToMem - HighPrio */
1166 <&dma 14 1 0x19>; /* Physical Chan 1 - MemToDev
1168 dma-names = "rx", "tx";
1183 dmas = <&dma 30 0 0x12>; /* Logical - DevToMem - HighPrio */
1184 dma-names = "rx";