Lines Matching refs:clocks

31 			clocks = <&cpg_clocks R8A7793_CLK_Z>;
69 		clocks = <&mstp1_clks R8A7793_CLK_CMT0>;
89 		clocks = <&mstp3_clks R8A7793_CLK_CMT1>;
113 		clocks = <&mstp4_clks R8A7793_CLK_IRQC>;
121 		clocks = <&mstp7_clks R8A7793_CLK_SCIF0>;
131 		clocks = <&mstp7_clks R8A7793_CLK_SCIF1>;
141 		clocks = <&mstp8_clks R8A7793_CLK_ETHER>;
149 	clocks {
163 		/* Special CPG clocks */
165 			compatible = "renesas,r8a7793-cpg-clocks",
166 				     "renesas,rcar-gen2-cpg-clocks";
168 			clocks = <&extal_clk>;
176 		/* Variable factor clocks */
181 			clocks = <&pll1_div2_clk>;
189 			clocks = <&pll1_div2_clk>;
197 			clocks = <&pll1_div2_clk>;
202 		/* Fixed factor clocks */
205 			clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
213 			clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
221 			clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
229 			clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
237 			clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
245 			clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
253 			clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
261 			clocks = <&pll1_div2_clk>;
269 			clocks = <&extal_clk>;
276 		/* Gate clocks */
278 			compatible = "renesas,r8a7793-mstp-clocks",
279 				     "renesas,cpg-mstp-clocks";
281 			clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
303 			compatible = "renesas,r8a7793-mstp-clocks",
304 				     "renesas,cpg-mstp-clocks";
306 			clocks = <&cp_clk>, <&sd3_clk>, <&sd2_clk>,
325 			compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
327 			clocks = <&cp_clk>;
333 			compatible = "renesas,r8a7793-mstp-clocks",
334 				     "renesas,cpg-mstp-clocks";
336 			clocks = <&mp_clk>,  <&hp_clk>, <&zs_clk>, <&p_clk>,
356 			compatible = "renesas,r8a7793-mstp-clocks",
357 				     "renesas,cpg-mstp-clocks";
359 			clocks = <&zx_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,