Lines Matching refs:clocks
53 clocks = <&cpg_clocks R8A7790_CLK_Z>;
136 clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
149 clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
162 clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
175 clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
188 clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
201 clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
209 clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
226 clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
246 clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
264 clocks = <&mstp4_clks R8A7790_CLK_IRQC>;
292 clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
323 clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
352 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
381 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
394 clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>;
406 clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>;
418 clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
429 clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
440 clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
451 clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
462 clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
475 clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
488 clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
501 clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
512 clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
525 clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
543 clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
554 clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
565 clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
576 clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
587 clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
599 clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>;
611 clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>;
623 clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
635 clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
647 clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
659 clocks = <&mstp7_clks R8A7790_CLK_SCIF0>;
671 clocks = <&mstp7_clks R8A7790_CLK_SCIF1>;
683 clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>;
695 clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>;
707 clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
719 clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>;
730 clocks = <&mstp8_clks R8A7790_CLK_SATA0>;
739 clocks = <&mstp8_clks R8A7790_CLK_SATA1>;
748 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
764 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
783 clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
792 clocks = <&mstp8_clks R8A7790_CLK_VIN1>;
801 clocks = <&mstp8_clks R8A7790_CLK_VIN2>;
810 clocks = <&mstp8_clks R8A7790_CLK_VIN3>;
819 clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
832 clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
846 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;
860 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;
879 clocks = <&mstp7_clks R8A7790_CLK_DU0>,
913 clocks = <&mstp9_clks R8A7790_CLK_RCAN0>,
924 clocks = <&mstp9_clks R8A7790_CLK_RCAN1>,
935 clocks = <&mstp1_clks R8A7790_CLK_JPU>;
939 clocks {
963 * The external audio clocks are configured as 0 Hz fixed frequency clocks by
964 * default. Boards that provide audio clocks should override them.
1003 /* Special CPG clocks */
1005 compatible = "renesas,r8a7790-cpg-clocks",
1006 "renesas,rcar-gen2-cpg-clocks";
1008 clocks = <&extal_clk &usb_extal_clk>;
1016 /* Variable factor clocks */
1020 clocks = <&pll1_div2_clk>;
1027 clocks = <&pll1_div2_clk>;
1034 clocks = <&pll1_div2_clk>;
1041 clocks = <&pll1_div2_clk>;
1048 clocks = <&pll1_div2_clk>;
1055 clocks = <&pll1_div2_clk>;
1060 /* Fixed factor clocks */
1063 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1071 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1079 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1087 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1095 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1103 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1111 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1119 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1127 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1135 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1143 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1151 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1159 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1167 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1175 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1183 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1191 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1199 clocks = <&pll1_div2_clk>;
1207 clocks = <&extal_clk>;
1214 /* Gate clocks */
1216 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1218 clocks = <&mp_clk>;
1224 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1226 clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>,
1247 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1249 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
1265 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1267 clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
1285 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1287 clocks = <&cp_clk>;
1293 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1295 clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7790_CLK_ADSP>,
1307 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1309 clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
1324 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1326 clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
1341 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1343 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>,
1360 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1362 clocks = <&p_clk>,
1401 clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>;
1415 clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
1428 clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
1441 clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
1454 clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
1467 clocks = <&mstp3_clks R8A7790_CLK_SSUSB>;
1480 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1515 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1533 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1585 clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>;
1606 clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>,