Lines Matching refs:clocks
71 clocks = <&cpg_clocks R8A7779_CLK_ZS>;
175 clocks = <&mstp0_clks R8A7779_CLK_I2C0>;
186 clocks = <&mstp0_clks R8A7779_CLK_I2C1>;
197 clocks = <&mstp0_clks R8A7779_CLK_I2C2>;
208 clocks = <&mstp0_clks R8A7779_CLK_I2C3>;
217 clocks = <&mstp0_clks R8A7779_CLK_SCIF0>;
227 clocks = <&mstp0_clks R8A7779_CLK_SCIF1>;
237 clocks = <&mstp0_clks R8A7779_CLK_SCIF2>;
247 clocks = <&mstp0_clks R8A7779_CLK_SCIF3>;
257 clocks = <&mstp0_clks R8A7779_CLK_SCIF4>;
267 clocks = <&mstp0_clks R8A7779_CLK_SCIF5>;
289 clocks = <&mstp0_clks R8A7779_CLK_TMU0>;
304 clocks = <&mstp0_clks R8A7779_CLK_TMU1>;
319 clocks = <&mstp0_clks R8A7779_CLK_TMU2>;
332 clocks = <&mstp1_clks R8A7779_CLK_SATA>;
340 clocks = <&mstp3_clks R8A7779_CLK_SDHI0>;
349 clocks = <&mstp3_clks R8A7779_CLK_SDHI1>;
358 clocks = <&mstp3_clks R8A7779_CLK_SDHI2>;
367 clocks = <&mstp3_clks R8A7779_CLK_SDHI3>;
378 clocks = <&mstp0_clks R8A7779_CLK_HSPI>;
389 clocks = <&mstp0_clks R8A7779_CLK_HSPI>;
400 clocks = <&mstp0_clks R8A7779_CLK_HSPI>;
409 clocks = <&mstp1_clks R8A7779_CLK_DU>;
430 clocks {
444 /* Special CPG clocks */
445 cpg_clocks: clocks@ffc80000 {
446 compatible = "renesas,r8a7779-cpg-clocks";
448 clocks = <&extal_clk>;
455 /* Fixed factor clocks */
458 clocks = <&cpg_clocks R8A7779_CLK_PLLA>;
466 clocks = <&cpg_clocks R8A7779_CLK_PLLA>;
474 clocks = <&cpg_clocks R8A7779_CLK_PLLA>;
482 clocks = <&cpg_clocks R8A7779_CLK_PLLA>;
489 /* Gate clocks */
490 mstp0_clks: clocks@ffc80030 {
491 compatible = "renesas,r8a7779-mstp-clocks",
492 "renesas,cpg-mstp-clocks";
494 clocks = <&cpg_clocks R8A7779_CLK_S>,
527 mstp1_clks: clocks@ffc80034 {
528 compatible = "renesas,r8a7779-mstp-clocks",
529 "renesas,cpg-mstp-clocks";
531 clocks = <&cpg_clocks R8A7779_CLK_P>,
556 mstp3_clks: clocks@ffc8003c {
557 compatible = "renesas,r8a7779-mstp-clocks",
558 "renesas,cpg-mstp-clocks";
560 clocks = <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>,