Lines Matching refs:clock
12 #include <dt-bindings/clock/r8a73a4-clock.h>
30 clock-frequency = <1500000000>;
121 clock-names = "fck";
338 clock-names = "sci_ick";
348 clock-names = "sci_ick";
358 clock-names = "sci_ick";
368 clock-names = "sci_ick";
378 clock-names = "sci_ick";
388 clock-names = "sci_ick";
473 compatible = "fixed-clock";
474 #clock-cells = <0>;
475 clock-frequency = <32768>;
476 clock-output-names = "extalr";
479 compatible = "fixed-clock";
480 #clock-cells = <0>;
481 clock-frequency = <25000000>;
482 clock-output-names = "extal1";
485 compatible = "fixed-clock";
486 #clock-cells = <0>;
487 clock-frequency = <48000000>;
488 clock-output-names = "extal2";
491 compatible = "fixed-clock";
492 #clock-cells = <0>;
494 clock-frequency = <0>;
495 clock-output-names = "fsiack";
498 compatible = "fixed-clock";
499 #clock-cells = <0>;
501 clock-frequency = <0>;
502 clock-output-names = "fsibck";
510 #clock-cells = <1>;
511 clock-output-names = "main", "pll0", "pll1", "pll2",
519 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
523 #clock-cells = <0>;
524 clock-output-names = "zb";
527 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
531 #clock-cells = <0>;
532 clock-output-names = "sdhi0ck";
535 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
539 #clock-cells = <0>;
540 clock-output-names = "sdhi1ck";
543 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
547 #clock-cells = <0>;
548 clock-output-names = "sdhi2ck";
551 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
555 #clock-cells = <0>;
556 clock-output-names = "mmc0";
559 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
563 #clock-cells = <0>;
564 clock-output-names = "mmc1";
567 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
572 #clock-cells = <0>;
573 clock-output-names = "vclk1";
576 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
581 #clock-cells = <0>;
582 clock-output-names = "vclk2";
585 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
590 #clock-cells = <0>;
591 clock-output-names = "vclk3";
594 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
599 #clock-cells = <0>;
600 clock-output-names = "vclk4";
603 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
608 #clock-cells = <0>;
609 clock-output-names = "vclk5";
612 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
616 #clock-cells = <0>;
617 clock-output-names = "fsia";
620 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
624 #clock-cells = <0>;
625 clock-output-names = "fsib";
628 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
632 #clock-cells = <0>;
633 clock-output-names = "mp";
636 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
639 #clock-cells = <0>;
640 clock-output-names = "m4";
643 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
647 #clock-cells = <0>;
648 clock-output-names = "hsi";
651 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
655 #clock-cells = <0>;
656 clock-output-names = "spuv";
661 compatible = "fixed-factor-clock";
663 #clock-cells = <0>;
664 clock-div = <2>;
665 clock-mult = <1>;
666 clock-output-names = "main_div2";
669 compatible = "fixed-factor-clock";
671 #clock-cells = <0>;
672 clock-div = <2>;
673 clock-mult = <1>;
674 clock-output-names = "pll0_div2";
677 compatible = "fixed-factor-clock";
679 #clock-cells = <0>;
680 clock-div = <2>;
681 clock-mult = <1>;
682 clock-output-names = "pll1_div2";
685 compatible = "fixed-factor-clock";
687 #clock-cells = <0>;
688 clock-div = <2>;
689 clock-mult = <1>;
690 clock-output-names = "extal1_div2";
699 #clock-cells = <1>;
700 clock-indices = <
706 clock-output-names =
719 #clock-cells = <1>;
720 clock-indices = <
728 clock-output-names =
739 #clock-cells = <1>;
740 clock-indices = <
744 clock-output-names =
751 #clock-cells = <1>;
752 clock-indices = <
755 clock-output-names =