Lines Matching refs:clock
24 #clock-cells = <0>;
25 compatible = "fixed-clock";
26 clock-frequency = <24576000>;
29 /* The chrystal is divided by 2 by the codec for the AACI bit clock */
31 #clock-cells = <0>;
32 compatible = "fixed-factor-clock";
33 clock-div = <2>;
34 clock-mult = <1>;
40 #clock-cells = <0>;
41 compatible = "fixed-clock";
42 clock-frequency = <25000000>;
45 /* The UART clock is 14.74 MHz divided from 25MHz by an ICS525 */
47 #clock-cells = <0>;
48 compatible = "fixed-clock";
49 clock-frequency = <14745600>;
54 #clock-cells = <0>;
55 compatible = "fixed-clock";
56 clock-frequency = <0>;
62 #clock-cells = <0>;
63 compatible = "fixed-clock";
64 clock-frequency = <24000000>;
69 * to drive video circuitry. Driven from the 24MHz clock.
72 #clock-cells = <0>;
77 /* The KMI clock is the 24 MHz oscillator divided to 8MHz */
79 #clock-cells = <0>;
80 compatible = "fixed-factor-clock";
81 clock-div = <3>;
82 clock-mult = <1>;
86 /* The timer clock is the 24 MHz oscillator divided to 1MHz */
88 #clock-cells = <0>;
89 compatible = "fixed-factor-clock";
90 clock-div = <24>;
91 clock-mult = <1>;
160 clock-names = "apb_pclk";
166 clock-names = "uartclk", "apb_pclk";
172 clock-names = "uartclk", "apb_pclk";
178 clock-names = "KMIREFCLK", "apb_pclk";
184 clock-names = "KMIREFCLK", "apb_pclk";
196 clock-names = "mclk", "apb_pclk";
204 clock-names = "apb_pclk";
212 clock-names = "clcd", "apb_pclk";