Lines Matching refs:clocks
169 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
178 clocks = <&clock CLK_MFC>;
191 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
203 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
215 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
229 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
255 clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
268 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>;
283 clocks = <&clock CLK_FIN_PLL>,
338 clocks = <&clock_audss EXYNOS_ADMA>;
349 clocks = <&clock CLK_PDMA0>;
360 clocks = <&clock CLK_PDMA1>;
371 clocks = <&clock CLK_MDMA0>;
382 clocks = <&clock CLK_MDMA1>;
404 clocks = <&clock_audss EXYNOS_I2S_BUS>,
423 clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
439 clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>;
460 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
476 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
492 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
502 clocks = <&clock CLK_PWM>;
524 clocks = <&clock CLK_DSIM1>, <&clock CLK_SCLK_MIPI1>;
535 clocks = <&clock CLK_TSADC>;
549 clocks = <&clock CLK_I2C0>;
563 clocks = <&clock CLK_I2C1>;
577 clocks = <&clock CLK_I2C2>;
591 clocks = <&clock CLK_I2C3>;
607 clocks = <&clock CLK_USI0>;
620 clocks = <&clock CLK_USI1>;
633 clocks = <&clock CLK_USI2>;
646 clocks = <&clock CLK_USI3>;
659 clocks = <&clock CLK_USI4>;
672 clocks = <&clock CLK_USI5>;
685 clocks = <&clock CLK_USI6>;
694 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
713 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
724 clocks = <&clock CLK_GSCL0>;
734 clocks = <&clock CLK_GSCL1>;
745 clocks = <&clock CLK_JPEG>;
754 clocks = <&clock CLK_JPEG2>;
762 clocks = <&clock CLK_FIN_PLL>;
778 clocks = <&clock CLK_TMU>;
787 clocks = <&clock CLK_TMU>;
796 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
805 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
814 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
846 clocks = <&clock CLK_WDT>;
855 clocks = <&clock CLK_SSS>;
861 clocks = <&clock CLK_USBD300>;
879 clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
887 clocks = <&clock CLK_USBD301>;
905 clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
916 clocks = <&clock CLK_USBH20>;
931 clocks = <&clock CLK_USBH20>;
944 clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
957 clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
967 clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
977 clocks = <&clock CLK_SMMU_MIXER>, <&clock CLK_MIXER>;
988 clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
999 clocks = <&clock CLK_SMMU_GSCL1>, <&clock CLK_GSCL1>;
1010 clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>;
1019 clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>;
1028 clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>;
1038 clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>;
1048 clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>;
1058 clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>;
1068 clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
1077 clocks = <&clock CLK_SMMU_JPEG2>, <&clock CLK_JPEG2>;
1087 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
1098 clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
1109 clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>;
1120 clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>;
1127 clocks = <&clock CLK_DP1>;
1135 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
1143 clocks = <&clock CLK_RTC>;
1150 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
1155 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
1160 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
1165 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;