Lines Matching refs:clock
16 #include <dt-bindings/clock/exynos5420.h>
19 #include <dt-bindings/clock/exynos-audss-clk.h>
61 clock-frequency = <1800000000>;
69 clock-frequency = <1800000000>;
77 clock-frequency = <1800000000>;
85 clock-frequency = <1800000000>;
93 clock-frequency = <1000000000>;
101 clock-frequency = <1000000000>;
109 clock-frequency = <1000000000>;
117 clock-frequency = <1000000000>;
159 clock: clock-controller@10010000 { label
160 compatible = "samsung,exynos5420-clock";
162 #clock-cells = <1>;
165 clock_audss: audss-clock-controller@3810000 {
166 compatible = "samsung,exynos5420-audss-clock";
168 #clock-cells = <1>;
169 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
170 <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
171 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
178 clocks = <&clock CLK_MFC>;
179 clock-names = "mfc";
191 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
192 clock-names = "biu", "ciu";
203 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
204 clock-names = "biu", "ciu";
215 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
216 clock-names = "biu", "ciu";
229 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
230 clock-names = "fin_pll", "mct";
255 clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
256 clock-names = "asb0", "asb1";
268 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>;
269 clock-names = "oscclk", "clk0";
283 clocks = <&clock CLK_FIN_PLL>,
284 <&clock CLK_MOUT_USER_ACLK200_DISP1>,
285 <&clock CLK_MOUT_USER_ACLK300_DISP1>,
286 <&clock CLK_MOUT_USER_ACLK400_DISP1>,
287 <&clock CLK_FIMD1>, <&clock CLK_MIXER>;
288 clock-names = "oscclk", "clk0", "clk1", "clk2", "asb0", "asb1";
339 clock-names = "apb_pclk";
349 clocks = <&clock CLK_PDMA0>;
350 clock-names = "apb_pclk";
360 clocks = <&clock CLK_PDMA1>;
361 clock-names = "apb_pclk";
371 clocks = <&clock CLK_MDMA0>;
372 clock-names = "apb_pclk";
382 clocks = <&clock CLK_MDMA1>;
383 clock-names = "apb_pclk";
407 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
408 #clock-cells = <1>;
409 clock-output-names = "i2s_cdclk0";
423 clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
424 clock-names = "iis", "i2s_opclk0";
425 #clock-cells = <1>;
426 clock-output-names = "i2s_cdclk1";
439 clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>;
440 clock-names = "iis", "i2s_opclk0";
441 #clock-cells = <1>;
442 clock-output-names = "i2s_cdclk2";
460 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
461 clock-names = "spi", "spi_busclk0";
476 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
477 clock-names = "spi", "spi_busclk0";
492 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
493 clock-names = "spi", "spi_busclk0";
502 clocks = <&clock CLK_PWM>;
503 clock-names = "timers";
524 clocks = <&clock CLK_DSIM1>, <&clock CLK_SCLK_MIPI1>;
525 clock-names = "bus_clk", "pll_clk";
535 clocks = <&clock CLK_TSADC>;
536 clock-names = "adc";
549 clocks = <&clock CLK_I2C0>;
550 clock-names = "i2c";
563 clocks = <&clock CLK_I2C1>;
564 clock-names = "i2c";
577 clocks = <&clock CLK_I2C2>;
578 clock-names = "i2c";
591 clocks = <&clock CLK_I2C3>;
592 clock-names = "i2c";
607 clocks = <&clock CLK_USI0>;
608 clock-names = "hsi2c";
620 clocks = <&clock CLK_USI1>;
621 clock-names = "hsi2c";
633 clocks = <&clock CLK_USI2>;
634 clock-names = "hsi2c";
646 clocks = <&clock CLK_USI3>;
647 clock-names = "hsi2c";
659 clocks = <&clock CLK_USI4>;
660 clock-names = "hsi2c";
672 clocks = <&clock CLK_USI5>;
673 clock-names = "hsi2c";
685 clocks = <&clock CLK_USI6>;
686 clock-names = "hsi2c";
694 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
695 <&clock CLK_DOUT_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
696 <&clock CLK_MOUT_HDMI>;
697 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
713 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
714 <&clock CLK_SCLK_HDMI>;
715 clock-names = "mixer", "hdmi", "sclk_hdmi";
724 clocks = <&clock CLK_GSCL0>;
725 clock-names = "gscl";
734 clocks = <&clock CLK_GSCL1>;
735 clock-names = "gscl";
744 clock-names = "jpeg";
745 clocks = <&clock CLK_JPEG>;
753 clock-names = "jpeg";
754 clocks = <&clock CLK_JPEG2>;
761 clock-names = "clkout16";
762 clocks = <&clock CLK_FIN_PLL>;
763 #clock-cells = <1>;
778 clocks = <&clock CLK_TMU>;
779 clock-names = "tmu_apbif";
787 clocks = <&clock CLK_TMU>;
788 clock-names = "tmu_apbif";
796 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
797 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
805 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
806 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
814 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
815 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
846 clocks = <&clock CLK_WDT>;
847 clock-names = "watchdog";
855 clocks = <&clock CLK_SSS>;
856 clock-names = "secss";
861 clocks = <&clock CLK_USBD300>;
862 clock-names = "usbdrd30";
879 clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
880 clock-names = "phy", "ref";
887 clocks = <&clock CLK_USBD301>;
888 clock-names = "usbdrd30";
905 clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
906 clock-names = "phy", "ref";
916 clocks = <&clock CLK_USBH20>;
917 clock-names = "usbhost";
931 clocks = <&clock CLK_USBH20>;
932 clock-names = "usbhost";
944 clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
945 clock-names = "phy", "ref";
956 clock-names = "sysmmu", "master";
957 clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
966 clock-names = "sysmmu", "master";
967 clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
976 clock-names = "sysmmu", "master";
977 clocks = <&clock CLK_SMMU_MIXER>, <&clock CLK_MIXER>;
987 clock-names = "sysmmu", "master";
988 clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
998 clock-names = "sysmmu", "master";
999 clocks = <&clock CLK_SMMU_GSCL1>, <&clock CLK_GSCL1>;
1009 clock-names = "sysmmu", "master";
1010 clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>;
1018 clock-names = "sysmmu", "master";
1019 clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>;
1027 clock-names = "sysmmu", "master";
1028 clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>;
1037 clock-names = "sysmmu", "master";
1038 clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>;
1047 clock-names = "sysmmu", "master";
1048 clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>;
1057 clock-names = "sysmmu", "master";
1058 clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>;
1067 clock-names = "sysmmu", "master";
1068 clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
1076 clock-names = "sysmmu", "master";
1077 clocks = <&clock CLK_SMMU_JPEG2>, <&clock CLK_JPEG2>;
1086 clock-names = "sysmmu", "master";
1087 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
1097 clock-names = "sysmmu", "master";
1098 clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
1108 clock-names = "sysmmu", "master";
1109 clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>;
1119 clock-names = "sysmmu", "master";
1120 clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>;
1127 clocks = <&clock CLK_DP1>;
1128 clock-names = "dp";
1135 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
1136 clock-names = "sclk_fimd", "fimd";
1143 clocks = <&clock CLK_RTC>;
1144 clock-names = "rtc";
1150 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
1151 clock-names = "uart", "clk_uart_baud0";
1155 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
1156 clock-names = "uart", "clk_uart_baud0";
1160 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
1161 clock-names = "uart", "clk_uart_baud0";
1165 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
1166 clock-names = "uart", "clk_uart_baud0";