Lines Matching refs:clocks
65 clocks = <&clock CLK_ARM_CLK>;
133 clocks = <&clock CLK_FIN_PLL>,
149 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
175 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
231 clocks = <&clock CLK_FIN_PLL>;
247 clocks = <&clock CLK_WDT>;
256 clocks = <&clock CLK_G2D>;
266 clocks = <&clock CLK_MFC>;
276 clocks = <&clock CLK_TMU>;
305 clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>;
315 clocks = <&clock CLK_SATA_PHYCTRL>;
328 clocks = <&clock CLK_I2C0>;
342 clocks = <&clock CLK_I2C1>;
356 clocks = <&clock CLK_I2C2>;
370 clocks = <&clock CLK_I2C3>;
384 clocks = <&clock CLK_I2C4>;
397 clocks = <&clock CLK_I2C5>;
410 clocks = <&clock CLK_I2C6>;
423 clocks = <&clock CLK_I2C7>;
436 clocks = <&clock CLK_I2C_HDMI>;
446 clocks = <&clock CLK_SATA_PHYI2C>;
461 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
477 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
493 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
505 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
517 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
529 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
541 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
555 clocks = <&clock_audss EXYNOS_I2S_BUS>,
571 clocks = <&clock CLK_I2S1>, <&clock CLK_DIV_I2S1>;
584 clocks = <&clock CLK_I2S2>, <&clock CLK_DIV_I2S2>;
592 clocks = <&clock CLK_USB3>;
610 clocks = <&clock CLK_USB3>, <&clock CLK_FIN_PLL>;
621 clocks = <&clock CLK_USB2>;
636 clocks = <&clock CLK_USB2>;
649 clocks = <&clock CLK_USB2>, <&clock CLK_FIN_PLL>;
661 clocks = <&clock CLK_PWM>;
676 clocks = <&clock CLK_PDMA0>;
687 clocks = <&clock CLK_PDMA1>;
698 clocks = <&clock CLK_MDMA0>;
709 clocks = <&clock CLK_MDMA1>;
722 clocks = <&clock CLK_GSCL0>;
732 clocks = <&clock CLK_GSCL1>;
742 clocks = <&clock CLK_GSCL2>;
752 clocks = <&clock CLK_GSCL3>;
762 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
775 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
791 clocks = <&clock CLK_ADC>;
803 clocks = <&clock CLK_SSS>;
813 clocks = <&clock CLK_SMMU_2D>, <&clock CLK_G2D>;
824 clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
835 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
845 clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>;
856 clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
866 clocks = <&clock CLK_SMMU_FIMC_ISP>;
876 clocks = <&clock CLK_SMMU_FIMC_DRC>;
886 clocks = <&clock CLK_SMMU_FIMC_FD>;
896 clocks = <&clock CLK_SMMU_FIMC_SCC>;
906 clocks = <&clock CLK_SMMU_FIMC_SCP>;
916 clocks = <&clock CLK_SMMU_FIMC_MCU>;
926 clocks = <&clock CLK_SMMU_FIMC_ODC>;
936 clocks = <&clock CLK_SMMU_FIMC_DIS0>;
946 clocks = <&clock CLK_SMMU_FIMC_DIS1>;
956 clocks = <&clock CLK_SMMU_FIMC_3DNR>;
967 clocks = <&clock CLK_SMMU_FIMC_LITE0>, <&clock CLK_CAMIF_TOP>;
978 clocks = <&clock CLK_SMMU_FIMC_LITE1>, <&clock CLK_CAMIF_TOP>;
989 clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
1000 clocks = <&clock CLK_SMMU_GSCL1>, <&clock CLK_GSCL1>;
1011 clocks = <&clock CLK_SMMU_GSCL2>, <&clock CLK_GSCL2>;
1022 clocks = <&clock CLK_SMMU_GSCL3>, <&clock CLK_GSCL3>;
1033 clocks = <&clock CLK_SMMU_FIMD1>, <&clock CLK_FIMD1>;
1044 clocks = <&clock CLK_SMMU_TV>, <&clock CLK_MIXER>;
1051 clocks = <&clock CLK_DP>;
1059 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
1065 clocks = <&clock CLK_RTC>;
1072 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
1077 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
1082 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
1087 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;