Lines Matching refs:clock
73 clock: clock-controller@10030000 { label
74 compatible = "samsung,exynos4412-clock";
76 #clock-cells = <1>;
84 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
85 clock-names = "fin_pll", "mct";
104 clocks = <&clock CLK_TSADC>;
105 clock-names = "adc";
116 clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
117 clock-names = "sclk_fimg2d", "fimg2d";
123 clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
124 <&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
125 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
133 clocks = <&clock CLK_FIMC_LITE0>;
134 clock-names = "flite";
144 clocks = <&clock CLK_FIMC_LITE1>;
145 clock-names = "flite";
155 clocks = <&clock CLK_FIMC_LITE0>,
156 <&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>,
157 <&clock CLK_PPMUISPMX>,
158 <&clock CLK_MOUT_MPLL_USER_T>,
159 <&clock CLK_FIMC_ISP>, <&clock CLK_FIMC_DRC>,
160 <&clock CLK_FIMC_FD>, <&clock CLK_MCUISP>,
161 <&clock CLK_DIV_ISP0>,<&clock CLK_DIV_ISP1>,
162 <&clock CLK_DIV_MCUISP0>,
163 <&clock CLK_DIV_MCUISP1>,
164 <&clock CLK_UART_ISP_SCLK>,
165 <&clock CLK_ACLK200>, <&clock CLK_DIV_ACLK200>,
166 <&clock CLK_ACLK400_MCUISP>,
167 <&clock CLK_DIV_ACLK400_MCUISP>;
168 clock-names = "lite0", "lite1", "ppmuispx",
190 clocks = <&clock CLK_I2C1_ISP>;
191 clock-names = "i2c_isp";
205 clocks = <&clock CLK_SDMMC4>, <&clock CLK_SCLK_MMC4>;
206 clock-names = "biu", "ciu";
215 clock-names = "sysmmu", "master";
216 clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
226 clock-names = "sysmmu";
227 clocks = <&clock CLK_SMMU_ISP>;
237 clock-names = "sysmmu";
238 clocks = <&clock CLK_SMMU_DRC>;
248 clock-names = "sysmmu";
249 clocks = <&clock CLK_SMMU_FD>;
259 clock-names = "sysmmu";
260 clocks = <&clock CLK_SMMU_ISPCX>;
270 clock-names = "sysmmu", "master";
271 clocks = <&clock CLK_SMMU_LITE0>, <&clock CLK_FIMC_LITE0>;
281 clock-names = "sysmmu", "master";
282 clocks = <&clock CLK_SMMU_LITE1>, <&clock CLK_FIMC_LITE1>;
344 clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
345 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
346 <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
382 clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
384 clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>,
385 <&clock CLK_OUT_LEFTBUS>, <&clock CLK_OUT_RIGHTBUS>,
386 <&clock CLK_OUT_CPU>, <&clock CLK_XXTI>, <&clock CLK_XUSBXTI>;
387 #clock-cells = <1>;
395 clocks = <&clock 383>;
396 clock-names = "tmu_apbif";