Lines Matching refs:assigned
44 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
48 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
50 assigned-clock-rates = <0>,
150 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
152 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
153 assigned-clock-rates = <0>, <176000000>;
158 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
160 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
161 assigned-clock-rates = <0>, <176000000>;
166 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
168 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
169 assigned-clock-rates = <0>, <176000000>;
174 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
176 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
177 assigned-clock-rates = <0>, <176000000>;