Lines Matching refs:assigned

186 			assigned-clocks = <&clock CLK_MOUT_FIMC0>,
188 			assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
189 			assigned-clock-rates = <0>, <160000000>;
194 			assigned-clocks = <&clock CLK_MOUT_FIMC1>,
196 			assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
197 			assigned-clock-rates = <0>, <160000000>;
202 			assigned-clocks = <&clock CLK_MOUT_FIMC2>,
204 			assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
205 			assigned-clock-rates = <0>, <160000000>;
210 			assigned-clocks = <&clock CLK_MOUT_FIMC3>,
212 			assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
213 			assigned-clock-rates = <0>, <160000000>;