Lines Matching refs:assigned

160 			assigned-clocks = <&clock CLK_MOUT_FIMC0>,
162 			assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
163 			assigned-clock-rates = <0>, <160000000>;
168 			assigned-clocks = <&clock CLK_MOUT_FIMC1>,
170 			assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
171 			assigned-clock-rates = <0>, <160000000>;
176 			assigned-clocks = <&clock CLK_MOUT_FIMC2>,
178 			assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
179 			assigned-clock-rates = <0>, <160000000>;
184 			assigned-clocks = <&clock CLK_MOUT_FIMC3>,
186 			assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
187 			assigned-clock-rates = <0>, <160000000>;