Lines Matching refs:r6
88 kphex r6, 8 /* processor id */
221 ldmia r0, {r1, r2, r3, r6, r10, r11, r12}
229 add r6, r6, r0 @ _edata
255 mov r10, r6
279 ldr lr, [r6, #0]
299 ldr r5, [r6, #4]
322 mov r1, r6
335 mov r1, r6
343 mov r8, r6 @ use the appended device tree
353 sub r1, r6, r1
358 ldr r5, [r6, #4]
372 add r6, r6, r5
429 sub r9, r6, r5 @ size to copy
432 add r6, r9, r5
435 1: ldmdb r6!, {r0 - r3, r10 - r12, lr}
436 cmp r6, r5
441 sub r6, r9, r6
445 add sp, sp, r6
451 add r0, r0, r6
575 .word _edata @ r6
698 orrhs r1, r1, r6 @ set RAM section settings
709 orr r1, r6, #0x04 @ ensure B is set for this
739 mov r6, #CB_BITS | 0x12 @ U
759 movne r6, #CB_BITS | 0x02 @ !XN
775 mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg
778 bic r6, r6, #1 << 31 @ 32-bit translation system
779 bic r6, r6, #3 << 0 @ use only ttbr0
782 mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
793 mov r6, #CB_BITS | 0x12 @ U
1181 THUMB( lsl r6, r9, r5 )
1182 THUMB( orr r11, r10, r6 ) @ factor way and cache number into r11
1183 THUMB( lsl r6, r7, r2 )
1184 THUMB( orr r11, r11, r6 ) @ factor index number into r11