Lines Matching refs:r1

81 		mov	r1, #\len
148 mov r7, r1 @ save architecture ID
221 ldmia r0, {r1, r2, r3, r6, r10, r11, r12}
228 sub r0, r0, r1 @ calculate the delta offset
281 ldr r1, =0xedfe0dd0 @ sig is 0xd00dfeed big endian
283 ldr r1, =0xd00dfeed
285 cmp lr, r1
302 eor r1, r5, r5, ror #16
303 bic r1, r1, #0x00ff0000
305 eor r5, r5, r1, lsr #8
322 mov r1, r6
335 mov r1, r6
352 adr r1, wont_overwrite
353 sub r1, r6, r1
354 subs r1, r5, r1
355 addhi r9, r9, r1
361 eor r1, r5, r5, ror #16
362 bic r1, r1, #0x00ff0000
364 eor r5, r5, r1, lsr #8
468 orrs r1, r0, r5
487 1: ldr r1, [r11, #0] @ relocate entries in the GOT
488 add r1, r1, r0 @ This fixes up C references
489 cmp r1, r2 @ if entry >= bss_start &&
490 cmphs r3, r1 @ bss_end > entry
491 addhi r1, r1, r5 @ entry += dtb size
492 str r1, [r11], #4 @ next entry
506 1: ldr r1, [r11, #0] @ relocate entries in the GOT
507 cmp r1, r2 @ entry < bss_start ||
508 cmphs r3, r1 @ _end < entry
509 addlo r1, r1, r0 @ table. This fixes up the
510 str r1, [r11], #4 @ C references.
540 mov r1, sp @ malloc space above stack
546 mov r1, r7 @ restore architecture number
572 LC0: .word LC0 @ r1
691 mov r1, #0x12 @ XN|U + section mapping
692 orr r1, r1, #3 << 10 @ AP=11
694 1: cmp r1, r9 @ if virt > start of RAM
695 cmphs r10, r1 @ && end of RAM > virt
696 bic r1, r1, #0x1c @ clear XN|U + C + B
697 orrlo r1, r1, #0x10 @ Set XN|U for non-RAM
698 orrhs r1, r1, r6 @ set RAM section settings
699 str r1, [r0], #4 @ 1:1 mapping
700 add r1, r1, #1048576
709 orr r1, r6, #0x04 @ ensure B is set for this
710 orr r1, r1, #3 << 10
713 orr r1, r1, r2, lsl #20
715 str r1, [r0], #4
716 add r1, r1, #1048576
717 str r1, [r0]
777 movne r1, #0xfffffffd @ domain 0 = client
781 mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
811 mov r1, #-1
813 mcr p15, 0, r1, c3, c0, 0 @ load domain access control
853 1: ldr r1, [r12, #0] @ get value
855 eor r1, r1, r9 @ (real ^ match)
856 tst r1, r2 @ & mask
1112 mov r1, #7 << 5 @ 8 segments
1113 1: orr r3, r1, #63 << 26 @ 64 entries
1117 subs r1, r1, #1 << 5
1128 mov r1, #0
1129 mcr p15, 0, r1, c7, c14, 0 @ clean and invalidate D cache
1130 mcr p15, 0, r1, c7, c5, 0 @ flush I cache
1131 mcr p15, 0, r1, c7, c10, 4 @ drain WB
1135 mov r1, #0
1137 mcreq p15, 0, r1, c7, c14, 0 @ clean+invalidate D
1138 mcr p15, 0, r1, c7, c5, 0 @ invalidate I+BTB
1139 mcreq p15, 0, r1, c7, c15, 0 @ clean+invalidate unified
1140 mcr p15, 0, r1, c7, c10, 4 @ drain WB
1162 mov r1, r0, lsr r2 @ extract cache type bits from clidr
1163 and r1, r1, #7 @ mask of the bits for current cache only
1164 cmp r1, #2 @ see what cache we have at this level
1168 mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
1169 and r2, r1, #7 @ extract the length of the cache lines
1172 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
1175 ands r7, r7, r1, lsr #13 @ extract max number of the index size
1222 mov r1, r3, lsr #18
1223 and r1, r1, #7
1225 mov r2, r2, lsl r1 @ base dcache size *2
1233 mov r1, pc
1234 bic r1, r1, #63 @ align to longest cache line
1235 add r2, r1, r2
1237 ARM( ldr r3, [r1], r11 ) @ s/w flush D cache
1238 THUMB( ldr r3, [r1] ) @ s/w flush D cache
1239 THUMB( add r1, r1, r11 )
1240 teq r1, r2
1243 mcr p15, 0, r1, c7, c5, 0 @ flush I cache
1244 mcr p15, 0, r1, c7, c6, 0 @ flush D cache
1245 mcr p15, 0, r1, c7, c10, 4 @ drain WB
1252 mov r1, #0
1253 mcr p15, 0, r1, c7, c0, 0 @ invalidate whole cache v3
1266 @ phex corrupts {r0, r1, r2, r3}
1269 strb r2, [r3, r1]
1270 1: subs r1, r1, #1
1278 strb r2, [r3, r1]
1281 @ puts corrupts {r0, r1, r2, r3}
1282 puts: loadsp r3, r1
1287 mov r1, #0x00020000
1288 3: subs r1, r1, #1
1296 @ putc corrupts {r0, r1, r2, r3}
1300 loadsp r3, r1
1303 @ memdump corrupts {r0, r1, r2, r3, r10, r11, r12, lr}
1309 mov r1, #8
1316 mov r1, #8