Lines Matching refs:c7
618 mcr p15, 0, r0, c6, c7, 0 @ PR7 Area Setting
619 mcr p15, 0, r0, c6, c7, 1
631 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
632 mcr p15, 0, r0, c7, c5, 0 @ flush(inval) I-Cache
633 mcr p15, 0, r0, c7, c6, 0 @ flush(inval) D-Cache
642 mcr p15, 0, r0, c7, c5, 0 @ flush(inval) I-Cache
643 mcr p15, 0, r0, c7, c6, 0 @ flush(inval) D-Cache
648 mcr p15, 0, r0, c6, c7, 0 @ PR7 Area Setting
658 mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
671 mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
742 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
743 mcr p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
750 mcr p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
762 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
764 mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
784 mcr p15, 0, r0, c7, c5, 4 @ ISB
788 mcr p15, 0, r0, c7, c5, 4 @ ISB
796 mcr p15, 0, r0, c7, c7, 0 @ Invalidate whole cache
797 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
798 mcr p15, 0, r0, c8, c7, 0 @ flush UTLB
803 mcr p15, 0, r0, c8, c7, 0 @ flush UTLB
1050 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
1051 mcr p15, 0, r0, c7, c6, 0 @ flush D-Cache
1052 mcr p15, 0, r0, c7, c5, 0 @ flush I-Cache
1060 mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
1069 mcr p15, 0, r0, c7, c7 @ invalidate whole cache v4
1070 mcr p15, 0, r0, c8, c7 @ invalidate whole TLB v4
1086 mcr p15, 0, r0, c8, c7, 0 @ invalidate whole TLB
1088 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTC
1089 mcr p15, 0, r0, c7, c10, 4 @ DSB
1090 mcr p15, 0, r0, c7, c5, 4 @ ISB
1111 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
1114 2: mcr p15, 0, r3, c7, c14, 2 @ clean & invalidate D index
1121 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
1122 mcr p15, 0, ip, c7, c10, 4 @ drain WB
1129 mcr p15, 0, r1, c7, c14, 0 @ clean and invalidate D cache
1130 mcr p15, 0, r1, c7, c5, 0 @ flush I cache
1131 mcr p15, 0, r1, c7, c10, 4 @ drain WB
1137 mcreq p15, 0, r1, c7, c14, 0 @ clean+invalidate D
1138 mcr p15, 0, r1, c7, c5, 0 @ invalidate I+BTB
1139 mcreq p15, 0, r1, c7, c15, 0 @ clean+invalidate unified
1140 mcr p15, 0, r1, c7, c10, 4 @ drain WB
1150 mcr p15, 0, r10, c7, c14, 0 @ clean+invalidate D
1153 mcr p15, 0, r10, c7, c10, 5 @ DMB
1167 mcr p15, 0, r10, c7, c5, 4 @ isb to sych the new cssr&csidr
1185 mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
1199 mcr p15, 0, r10, c7, c10, 4 @ DSB
1200 mcr p15, 0, r10, c7, c5, 0 @ invalidate I+BTB
1201 mcr p15, 0, r10, c7, c10, 4 @ DSB
1202 mcr p15, 0, r10, c7, c5, 4 @ ISB
1208 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache
1210 mcr p15, 0, r0, c7, c5, 0 @ flush I cache
1211 mcr p15, 0, r0, c7, c10, 4 @ drain WB
1243 mcr p15, 0, r1, c7, c5, 0 @ flush I cache
1244 mcr p15, 0, r1, c7, c6, 0 @ flush D cache
1245 mcr p15, 0, r1, c7, c10, 4 @ drain WB
1253 mcr p15, 0, r1, c7, c0, 0 @ invalidate whole cache v3