Lines Matching refs:r3
175 GET_TSK_STACK_BASE r3, sp
208 ld.as r3, [r1, r0] ; PGD entry corresp to faulting addr
209 tst r3, r3
213 and.f 0, r3, _PAGE_HW_SZ ; Is this Huge PMD (thp)
216 mov.nz r0, r3
219 and r1, r3, PAGE_MASK
243 ld r3, [num_pte_not_present]
244 add r3, r3, 1
245 st r3, [num_pte_not_present]
258 and r3, r0, PTE_BITS_RWX ; r w x
259 asl r2, r3, 3 ; Kr Kw Kx 0 0 0 (GLOBAL, kernel only)
261 or.z r2, r2, r3 ; Kr Kw Kx Ur Uw Ux (!GLOBAL, user page)
263 and r3, r0, PTE_BITS_NON_RWX_IN_PD1 ; Extract PFN+cache bits from PTE
264 or r3, r3, r2
266 sr r3, [ARC_REG_TLBPD1] ; paddr[31..13] | Kr Kw Kx Ur Uw Ux | C
268 ld r3, [r1, 4] ; paddr[39..32]
269 sr r3, [ARC_REG_TLBPD1HI]
274 lr r3,[ARC_REG_TLBPD0] ; MMU prepares PD0 with vaddr and asid
276 or r3, r3, r2 ; S | vaddr | {sasid|asid}
277 sr r3,[ARC_REG_TLBPD0] ; rewrite PD0
328 and r3, r0, r2 ; Mask out NON Flag bits from PTE
329 xor.f r3, r3, r2 ; check ( ( pte & flags_test ) == flags_test )
375 lr r3, [ecr]
376 btst_s r3, ECR_C_BIT_DTLB_LD_MISS ; Read Access
378 btst_s r3, ECR_C_BIT_DTLB_ST_MISS ; Write Access
383 and r3, r0, r2 ; Mask out NON Flag bits from PTE
384 brne.d r3, r2, do_slow_path_pf ; is ((pte & flags_test) == flags_test)
388 lr r3, [ecr]
390 btst_s r3, ECR_C_BIT_DTLB_ST_MISS ; See if it was a Write Access ?