Lines Matching refs:paddr

28 void (*_cache_line_loop_ic_fn)(phys_addr_t paddr, unsigned long vaddr,
219 void __cache_line_loop_v2(phys_addr_t paddr, unsigned long vaddr, in __cache_line_loop_v2() argument
240 sz += paddr & ~CACHE_LINE_MASK; in __cache_line_loop_v2()
241 paddr &= CACHE_LINE_MASK; in __cache_line_loop_v2()
248 paddr |= (vaddr >> PAGE_SHIFT) & 0x1F; in __cache_line_loop_v2()
251 write_aux_reg(aux_cmd, paddr); in __cache_line_loop_v2()
252 paddr += L1_CACHE_BYTES; in __cache_line_loop_v2()
261 void __cache_line_loop_v3(phys_addr_t paddr, unsigned long vaddr, in __cache_line_loop_v3() argument
283 sz += paddr & ~CACHE_LINE_MASK; in __cache_line_loop_v3()
284 paddr &= CACHE_LINE_MASK; in __cache_line_loop_v3()
294 write_aux_reg(aux_tag, paddr); in __cache_line_loop_v3()
304 write_aux_reg(ARC_REG_IC_PTAG_HI, (u64)paddr >> 32); in __cache_line_loop_v3()
308 write_aux_reg(aux_tag, paddr); in __cache_line_loop_v3()
309 paddr += L1_CACHE_BYTES; in __cache_line_loop_v3()
331 void __cache_line_loop_v4(phys_addr_t paddr, unsigned long vaddr, in __cache_line_loop_v4() argument
352 sz += paddr & ~CACHE_LINE_MASK; in __cache_line_loop_v4()
353 paddr &= CACHE_LINE_MASK; in __cache_line_loop_v4()
369 write_aux_reg(ARC_REG_IC_PTAG_HI, (u64)paddr >> 32); in __cache_line_loop_v4()
371 write_aux_reg(ARC_REG_DC_PTAG_HI, (u64)paddr >> 32); in __cache_line_loop_v4()
375 write_aux_reg(aux_cmd, paddr); in __cache_line_loop_v4()
376 paddr += L1_CACHE_BYTES; in __cache_line_loop_v4()
451 static inline void __dc_line_op(phys_addr_t paddr, unsigned long vaddr, in __dc_line_op() argument
460 __cache_line_loop(paddr, vaddr, sz, op); in __dc_line_op()
470 #define __dc_line_op(paddr, vaddr, sz, op) argument
471 #define __dc_line_op_k(paddr, sz, op) argument
484 __ic_line_inv_vaddr_local(phys_addr_t paddr, unsigned long vaddr, in __ic_line_inv_vaddr_local() argument
490 (*_cache_line_loop_ic_fn)(paddr, vaddr, sz, OP_INV_IC); in __ic_line_inv_vaddr_local()
501 phys_addr_t paddr, vaddr; member
509 __ic_line_inv_vaddr_local(ic_inv->paddr, ic_inv->vaddr, ic_inv->sz); in __ic_line_inv_vaddr_helper()
512 static void __ic_line_inv_vaddr(phys_addr_t paddr, unsigned long vaddr, in __ic_line_inv_vaddr() argument
516 .paddr = paddr, in __ic_line_inv_vaddr()
533 noinline void slc_op(phys_addr_t paddr, unsigned long sz, const int op) in slc_op() argument
575 write_aux_reg(ARC_REG_SLC_RGN_END, (paddr + sz + l2_line_sz - 1)); in slc_op()
576 write_aux_reg(ARC_REG_SLC_RGN_START, paddr); in slc_op()
623 phys_addr_t paddr = (unsigned long)page_address(page); in flush_dcache_page() local
626 if (addr_not_cache_congruent(paddr, vaddr)) in flush_dcache_page()
627 __flush_dcache_page(paddr, vaddr); in flush_dcache_page()
771 void __sync_icache_dcache(phys_addr_t paddr, unsigned long vaddr, int len) in __sync_icache_dcache() argument
773 __dc_line_op(paddr, vaddr, len, OP_FLUSH_N_INV); in __sync_icache_dcache()
774 __ic_line_inv_vaddr(paddr, vaddr, len); in __sync_icache_dcache()
778 void __inv_icache_page(phys_addr_t paddr, unsigned long vaddr) in __inv_icache_page() argument
780 __ic_line_inv_vaddr(paddr, vaddr, PAGE_SIZE); in __inv_icache_page()
787 void __flush_dcache_page(phys_addr_t paddr, unsigned long vaddr) in __flush_dcache_page() argument
789 __dc_line_op(paddr, vaddr & PAGE_MASK, PAGE_SIZE, OP_FLUSH_N_INV); in __flush_dcache_page()
815 unsigned int paddr = pfn << PAGE_SHIFT; in flush_cache_page() local
819 __flush_dcache_page(paddr, u_vaddr); in flush_cache_page()
822 __inv_icache_page(paddr, u_vaddr); in flush_cache_page()