Lines Matching refs:op

220 			  unsigned long sz, const int op)  in __cache_line_loop_v2()  argument
226 if (op == OP_INV_IC) { in __cache_line_loop_v2()
230 aux_cmd = op & OP_INV ? ARC_REG_DC_IVDL : ARC_REG_DC_FLDL; in __cache_line_loop_v2()
262 unsigned long sz, const int op) in __cache_line_loop_v3() argument
268 if (op == OP_INV_IC) { in __cache_line_loop_v3()
272 aux_cmd = op & OP_INV ? ARC_REG_DC_IVDL : ARC_REG_DC_FLDL; in __cache_line_loop_v3()
303 if (is_pae40_enabled() && op == OP_INV_IC) in __cache_line_loop_v3()
394 static inline void __before_dc_op(const int op) in __before_dc_op() argument
396 if (op == OP_FLUSH_N_INV) { in __before_dc_op()
407 static inline void __after_dc_op(const int op) in __after_dc_op() argument
409 if (op & OP_FLUSH) { in __after_dc_op()
418 if (op == OP_FLUSH_N_INV) in __after_dc_op()
429 static inline void __dc_entire_op(const int op) in __dc_entire_op() argument
433 __before_dc_op(op); in __dc_entire_op()
435 if (op & OP_INV) /* Inv or flush-n-inv use same cmd reg */ in __dc_entire_op()
442 __after_dc_op(op); in __dc_entire_op()
446 #define __dc_line_op_k(p, sz, op) __dc_line_op(p, p, sz, op) argument
452 unsigned long sz, const int op) in __dc_line_op() argument
458 __before_dc_op(op); in __dc_line_op()
460 __cache_line_loop(paddr, vaddr, sz, op); in __dc_line_op()
462 __after_dc_op(op); in __dc_line_op()
469 #define __dc_entire_op(op) argument
470 #define __dc_line_op(paddr, vaddr, sz, op) argument
471 #define __dc_line_op_k(paddr, sz, op) argument
533 noinline void slc_op(phys_addr_t paddr, unsigned long sz, const int op) in slc_op() argument
558 if (!(op & OP_FLUSH)) /* i.e. OP_INV */ in slc_op()
563 if (op & OP_INV) in slc_op()