50 # define DBG_CFG(args)	printk args
216 	printk("dont_care == 0x%lx\n", dont_care);  in tsunami_probe_read()
234 		printk("tsunami_probe_write: unit %d at 0x%016lx\n", source,  in tsunami_probe_write()
284 		printk(KERN_ERR "Failed to request IO on hose %d\n", index);  in tsunami_init_one_pchip()
286 		printk(KERN_ERR "Failed to request MEM on hose %d\n", index);  in tsunami_init_one_pchip()
385 	printk("%s: probing bogus address:  0x%016lx\n", __func__, bogus_addr);  in tsunami_init_arch()
386 	printk("\tprobe %s\n",  in tsunami_init_arch()
392 	printk("%s: CChip registers:\n", __func__);  in tsunami_init_arch()
393 	printk("%s: CSR_CSC 0x%lx\n", __func__, TSUNAMI_cchip->csc.csr);  in tsunami_init_arch()
394 	printk("%s: CSR_MTR 0x%lx\n", __func__, TSUNAMI_cchip.mtr.csr);  in tsunami_init_arch()
395 	printk("%s: CSR_MISC 0x%lx\n", __func__, TSUNAMI_cchip->misc.csr);  in tsunami_init_arch()
396 	printk("%s: CSR_DIM0 0x%lx\n", __func__, TSUNAMI_cchip->dim0.csr);  in tsunami_init_arch()
397 	printk("%s: CSR_DIM1 0x%lx\n", __func__, TSUNAMI_cchip->dim1.csr);  in tsunami_init_arch()
398 	printk("%s: CSR_DIR0 0x%lx\n", __func__, TSUNAMI_cchip->dir0.csr);  in tsunami_init_arch()
399 	printk("%s: CSR_DIR1 0x%lx\n", __func__, TSUNAMI_cchip->dir1.csr);  in tsunami_init_arch()
400 	printk("%s: CSR_DRIR 0x%lx\n", __func__, TSUNAMI_cchip->drir.csr);  in tsunami_init_arch()
402 	printk("%s: DChip registers:\n");  in tsunami_init_arch()
403 	printk("%s: CSR_DSC 0x%lx\n", __func__, TSUNAMI_dchip->dsc.csr);  in tsunami_init_arch()
404 	printk("%s: CSR_STR 0x%lx\n", __func__, TSUNAMI_dchip->str.csr);  in tsunami_init_arch()
405 	printk("%s: CSR_DREV 0x%lx\n", __func__, TSUNAMI_dchip->drev.csr);  in tsunami_init_arch()