Lines Matching refs:must

18 	data: 4-byte alignment physical address of a memory area which must be
47 	Availability of this MSR must be checked via bit 3 in 0x4000001 cpuid
52 	data: 4-byte aligned physical address of a memory area which must be in
125 	Availability of this MSR must be checked via bit 3 in 0x4000001 cpuid
136 	Availability of this MSR must be checked via bit 0 in 0x4000001 cpuid
146 	Availability of this MSR must be checked via bit 0 in 0x4000001 cpuid
168 	64 byte memory area which must be in guest RAM and must be
179 	interrupt inhibits APFs. Guest must not enable interrupt
182 	fault guest must reset the reason to 0 before it does
203 	data: 64-byte alignment physical address of a memory area which must be
237 	when disabled.  Bit 1 is reserved and must be zero.  When PV end of
239 	physical address of a 4 byte memory area which must be in guest RAM and
240 	must be zeroed.
264 	guest must both read the least significant bit in the memory area and