Lines Matching refs:shadow

1 The x86 kvm shadow mmu
42 spte  shadow pte (referring to pfns)
73 direct mode; otherwise it operates in shadow mode (see below).
105 The principal data structure is the shadow page, 'struct kvm_mmu_page'.  A
106 shadow page contains 512 sptes, which can be either leaf or nonleaf sptes.  A
107 shadow page may contain a mix of leaf and nonleaf sptes.
110 is not related to a translation directly.  It points to other shadow pages.
133     The level in the shadow paging hierarchy that this shadow page belongs to.
147     so multiple shadow pages are needed to shadow one guest page.
148     For first-level shadow pages, role.quadrant can be 0 or 1 and denotes the
152     shadow pages) so role.quadrant takes values in the range 0..3.  Each
179     shadow page; it is also used to go back from a struct kvm_mmu_page
189     at the shadow page structure.
190     sptes in spt point either at guest pages, or at lower-level shadow pages.
191     Specifically, if sp1 and sp2 are shadow pages, then sp1->spt[n] may point
193     The spt array forms a DAG structure with the shadow page as a node, and
225     during hash table lookup, and used to skip invalidated shadow pages (see
267 As a side effect we have to resynchronize all reachable unsynchronized shadow
282     - synchronized shadow pages are write protected (*)
291    - walk shadow page table
305  - walk the shadow page table to find the spte for the translation,
317   - walk the shadow page hierarchy and drop affected translations
324   - look up new shadow roots
325   - synchronize newly reachable shadow pages
329   - look up new shadow roots
330   - synchronize newly reachable shadow pages
362   shadow paging is in use.
365   CR4.SMAP && !CR0.WP into shadow page's role to avoid this case. Note,
373 it will simply be missed by the shadow page lookup code.  A similar issue
409 which is stored in kvm->arch.mmu_valid_gen.  Every shadow page stores
413 When KVM need zap all shadow pages sptes, it just simply increases the global
414 generation-number then reload root shadow pages on all vcpus.  As the VCPUs
415 create new shadow page tables, the old pages are not used because of the
429 shadow pages, and is made more scalable with a similar technique.