Lines Matching refs:be

7 (to be written)
15 the mmu-lock on x86. Currently, the page fault can be fast only if the
28 is safe because whenever changing these bits can be detected by cmpxchg.
32 The mapping from gfn to pfn may be changed since we can only ensure the pfn
64 - We have held the refcount of pfn that means the pfn can not be freed and
65   be reused for another gfn.
66 - The pfn is writable that means it can not be shared between different gfns
75 In the origin code, the spte can be fast updated (non-atomically) if the
77 Accessed bit and Dirty bit can not be lost.
79 But it is not true after fast page fault since the spte can be marked
114 if it can be updated out of mmu-lock, see spte_has_volatile_bits(), it means,
120 writable spte might be cached on a CPU's TLB.
122 As mentioned before, the spte can be updated to writable out of mmu-lock on
124 be flushed caused by this reason in mmu_spte_update() since this is a common
127 Since the spte is "volatile" if it can be updated out of mmu-lock, we always
128 atomically update the spte, the race caused by fast page fault can be avoided,
143 Comment:	'raw' because hardware enabling/disabling must be atomic /wrt
151 Comment:	'raw' because updating the tsc offsets must not be preempted.
164 Comment:	The srcu read lock must be held while accessing memslots (e.g.
167 		The srcu index can be stored in kvm_vcpu->srcu_idx per vcpu