Lines Matching refs:timer

11 architected timer, which itself supports virtualization, and therefore
70 handled on the host (see details on the timer as an example below).  For other
138 The architected timer is a device that signals interrupts with level
139 triggered semantics.  The timer hardware is directly accessed by VCPUs
140 which program the timer to fire at some point in time.  Each VCPU on a
141 system programs the timer to fire at different times, and therefore the
143 context-switching the timer state along with each VCPU thread.
152 5.  KVM stores the timer state to memory and disables the hardware timer
153 6.  KVM schedules a soft timer to fire in T+(100 - time since step 2)
155 8.  The soft timer fires, waking up the VCPU thread
156 9.  KVM reprograms the timer hardware with the VCPU's values
157 10. KVM marks the timer interrupt as active on the physical distributor
163 exactly why we mark the timer interrupt as active in step 10, because
165 belonging to the timer hardware, which is context-switched along with
173 4.  At T+100 the timer fires and a physical IRQ causes the VM to exit
177     stores the virtual timer state to memory and disables the virtual hw timer.
178 6.  KVM looks at the timer state (in memory) and injects a forwarded physical
179     interrupt because it concludes the timer has expired.
180 7.  KVM marks the timer interrupt as active on the physical distributor
181 7.  KVM enables the timer, enables interrupts, and runs the VCPU
186 timer is disabled upon guest return, and the virtual forwarded interrupt is