Lines Matching refs:DMA

1 This page describes the structures and procedures used by the cx2341x DMA
7 The cx2341x PCI interface is busmaster capable. This means it has a DMA
23 Mailbox #10 is reserved for DMA transfer information.
30 This section describes, in general, the order of events when handling DMA
37 - The driver schedules the DMA transfer via the ScheduleDMAtoHost API call.
38 - The card raises the DMA Complete interrupt.
39 - The driver checks the DMA status register for any errors.
42 NOTE! It is possible that the Encoder and DMA Complete interrupts get raised
65 addresses are the physical memory location of the target DMA buffer.
86 DMA Transfer Status
89 Register 0x0004 holds the DMA Transfer Status:
94 2   DMA read error
95 3   DMA write error