Lines Matching refs:burst
754 burst:0 burst disabled
755 burst:255 get burst length from initial IO register settings.
756 burst:#x burst enabled (1<<#x burst transfers max)
757 #x is an integer value which is log base 2 of the burst transfers max.
758 The NCR53C875 and NCR53C825A support up to 128 burst transfers (#x = 7).
760 This is a maximum value. The driver set the burst length according to chip
804 0x4: Increase if necessary PCI latency timer according to burst max.
871 burst length from BIOS settings burst:255
886 tags:0,sync:50,debug:0,burst:7,led:0,wide:1,settle:2,diff:0,irqm:0
899 tags:32,sync:12,debug:0,burst:7,led:1,wide:1,settle:2,diff:0,irqm:0
1058 during scsi transfer processing: burst op-code fetch, read multiple,
1060 burst 128 (875 only), large dma fifo (875 only), offset 16 (875 only).