Lines Matching refs:IOP

6 For RR44xx Intel IOP based adapters, the controller IOP is accessed via PCI BAR0 and BAR2:
25 For Intel IOP based adapters, the controller IOP is accessed via PCI BAR0:
40 For Marvell not Frey IOP based adapters, the IOP is accessed via PCI BAR0 and BAR1:
58 For Marvell Frey IOP based adapters, the IOP is accessed via PCI BAR0 and BAR1:
61              0x0    IOP configuration information.
85 A request packet can be allocated in either IOP or host memory.
93       relative to the IOP BAR0.
99     - Post the packet to IOP by writing it to inbound queue. For requests
100       allocated in IOP memory, write the offset to inbound queue port. For
104     - The IOP process the request. When the request is completed, it
108       For requests allocated in IOP memory, the request offset is posted to
118       For requests allocated in IOP memory, the host driver free the request
145     - Post the inbound list writer pointer to IOP.
147     - The IOP process the request. When the request is completed, the flag of