Lines Matching refs:we

32 The following section provides a rough description of what we have on P8
43     For DMA, MSIs and inbound PCIe error messages, we have a table (in
48     - For DMA we then provide an entire address space for each PE that can
54     - For MSIs, we have two windows in the address space (one at the top of
82 	reserved for MSIs but this is not a problem at this point; we just
84 	ignores that however and will forward in that space if we try).
91     Now, this is the "main" window we use in Linux today (excluding
96     Ideally we would like to be able to have individual functions in PEs
107 	bits which are not conveyed by PowerBus but we don't use this.
109       * Can be configured to be segmented.  When not segmented, we can
125     Then we do the same thing as with M32, using the bridge alignment
128     Since we cannot remap, we have two additional constraints:
131       because the addresses we use directly determine the PE#.  We then
136       than one segment, we end up with more than one PE#.  There is a HW
139       you freeze a switch, it freezes all its children).  So we do it in
141       the best we found.  So when any of the PEs freezes, we freeze the
149     sense, but we haven't done it yet.
198     equally-sized segments, and the segment number is the PE#.  But if we
200     and different segment sizes.  If we have VFs that each have a 1MB BAR
201     and a 32MB BAR, we could use one M64 window to assign 1MB segments and
205   more in the next two sections.  For a given VF BAR, we need to
220   than the number of M64 window segments, so if we map one VF BAR directly
225   total_VFs is less than 256, we have the situation in Figure 1.0, where
277 window, we can set the PE# by updating the table that translates segments
278 to PE#s.  Similarly, if the address is in an unsegmented M64 window, we can
293 are contiguous.  If VF0 is in PE(x), then VF(n) is in PE(x+n).  If we