Lines Matching refs:space

48     - For DMA we then provide an entire address space for each PE that can
54     - For MSIs, we have two windows in the address space (one at the top of
55       the 32-bit space and one much higher) which, via a combination of the
66     from the CPU address space to the PCI address space.  There is one M32
69     the CPU address space to the PCIe bus and must be naturally aligned
80 	portion of address space from the CPU to PCIe
84 	ignores that however and will forward in that space if we try).
87 	maps each segment to a PE#.  That allows portions of the MMIO space
93     onto a segment alignment/granularity so that the space behind a bridge
118     for large BARs in 64-bit space:
120     We configure an M64 window to cover the entire region of address space
121     that has been assigned by FW for the PHB (about 64GB, ignore the space
130     - We do the PE# allocation *after* the 64-bit space has been assigned
160     PCI devices, but the BARs in VF config space headers are unusual.  For
161     a non-VF device, software uses BARs in the config space header to
164     discover sizes and assign addresses.  The BARs in the VF's config space
234                            VF(n) BAR space
243 		Figure 1.0 Direct map VF(n) BAR space
246   space doesn't need that much, as shown in Figure 1.1:
253                            VF(n) BAR space + extra
262 		Figure 1.1 Map VF(n) BAR space + extra
264   Allocating the extra space ensures that the entire M64 window will be
265   assigned to this one SR-IOV device and none of the space will be
266   available for other devices.  Note that this only expands the space
273 The PCIe SR-IOV spec requires that the base of the VF(n) BAR space be
283 of the VF(n) BAR space in the VF BAR.  If the PCI core allocates the exact
284 amount of space required for the VF(n) BAR space, the VF BAR value is fixed
287 On the other hand, if the PCI core allocates additional space, the VF BAR
288 value can be changed as long as the entire VF(n) BAR space remains inside
289 the space allocated by the core.
300 space will consume (numVFs * n) segments.  That means there aren't as many
301 available segments for adjusting base of the VF(n) BAR space.