Lines Matching refs:SR
92 SR-IOV). We basically use the trick of forcing the bridge MMIO windows
151 3. Considerations for SR-IOV on PowerKVM
153 * SR-IOV Background
155 The PCIe SR-IOV feature allows a single Physical Function (PF) to
156 support several Virtual Functions (VFs). Registers in the PF's SR-IOV
163 software uses VF BAR registers in the *PF* SR-IOV Capability to
167 When a VF BAR in the PF SR-IOV Capability is programmed, it sets the
169 PF SR-IOV Capability is programmed to enable eight VFs, and it has a
204 Finally, the plan to use M64 windows for SR-IOV, which will be described
217 SR-IOV VF BARs are all the same size.
265 assigned to this one SR-IOV device and none of the space will be
273 The PCIe SR-IOV spec requires that the base of the VF(n) BAR space be