Lines Matching refs:tail

41 and "tail" pointers, managed by the OS, and a hardware current
50 The tail pointer tails or trails the hardware pointer. When the
51 hardware is ahead, the tail pointer will be pointing at a "full"
53 and advance the tail pointer.  Thus, when there is flowing RX traffic,
54 all of the descrs in front of the tail pointer should be "full", and
56 flowing, then the tail pointer can catch up to the hardware pointer.
57 The OS will then note that the current tail is "empty", and halt
60 The head pointer (somewhat mis-named) follows after the tail pointer.
68 RX traffic is flowing, then the head pointer can catch up to the tail
72 Thus, in an idle system, the GDACTDPA, tail and head pointers will
77 GDACTDPA, tail and head pointers. It will also summarize the contents
78 of the ring, starting at the tail pointer, and listing the status
84 net eth1: Chain tail located at descr=20
92 head and tail are pointing at 20, because it has not yet been emptied.
95 The "Have nnn decrs" refers to the descr starting at the tail: in this
131 deadlock condition, as the tail pointer will be pointing at this descr,
144 net eth1: Chain tail located at descr=255
154 Both the tail and head pointers are pointing at descr 255, which is
165 descr 254, since tail was at 255.) Thus, the system is deadlocked,